[llvm] [AMDGPU][MC] Allow null where 128b or larger dst reg is expected (PR #115200)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 16 02:59:40 PST 2024


================
@@ -279,8 +279,11 @@ DECODE_OPERAND_REG_7(SReg_64_XEXEC, OPW64)
 DECODE_OPERAND_REG_7(SReg_64_XEXEC_XNULL, OPW64)
 DECODE_OPERAND_REG_7(SReg_96, OPW96)
 DECODE_OPERAND_REG_7(SReg_128, OPW128)
+DECODE_OPERAND_REG_7(SReg_128_XNULL, OPW128)
 DECODE_OPERAND_REG_7(SReg_256, OPW256)
+DECODE_OPERAND_REG_7(SReg_256_XNULL, OPW256)
 DECODE_OPERAND_REG_7(SReg_512, OPW512)
+DECODE_OPERAND_REG_7(SReg_512_XNULL, OPW512)
----------------
jayfoad wrote:

This one isn't used.

https://github.com/llvm/llvm-project/pull/115200


More information about the llvm-commits mailing list