[llvm] [AMDGPU] Fix user SGPR alloc order in docs (PR #119092)

Austin Kerbow via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 7 12:11:37 PST 2024


https://github.com/kerbowa created https://github.com/llvm/llvm-project/pull/119092

NFC. Preload kernarg SGPRs are allocated after the private segment size SGPR.  This patch updates AMDGPUUsage.rst to reflect this.

>From 673a6e049663f54ddc587ca2e2182046781c1581 Mon Sep 17 00:00:00 2001
From: Austin Kerbow <Austin.Kerbow at amd.com>
Date: Sat, 7 Dec 2024 12:07:52 -0800
Subject: [PATCH] [AMDGPU] Fix user SGPR alloc order in docs

NFC. Preload kernarg SGPRs are allocated after the private segment size
SGPR.  This patch updates AMDGPUUsage.rst to reflect this.
---
 llvm/docs/AMDGPUUsage.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 7dbfa8c085b91a..5c6034753eb4af 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -5756,9 +5756,6 @@ SGPR register initial state is defined in
      then       Flat Scratch Init          2      See
                 (enable_sgpr_flat_scratch         :ref:`amdgpu-amdhsa-kernel-prolog-flat-scratch`.
                 _init)
-     then       Preloaded Kernargs         N/A    See
-                (kernarg_preload_spec             :ref:`amdgpu-amdhsa-kernarg-preload`.
-                _length)
      then       Private Segment Size       1      The 32-bit byte size of a
                 (enable_sgpr_private              single work-item's memory
                 _segment_size)                    allocation. This is the
@@ -5779,6 +5776,9 @@ SGPR register initial state is defined in
                                                   may be needed for GFX9-GFX11 which
                                                   changes the meaning of the
                                                   Flat Scratch Init value.
+     then       Preloaded Kernargs         N/A    See
+                (kernarg_preload_spec             :ref:`amdgpu-amdhsa-kernarg-preload`.
+                _length)
      then       Work-Group Id X            1      32-bit work-group id in X
                 (enable_sgpr_workgroup_id         dimension of grid for
                 _X)                               wavefront.



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