[llvm] f7685af - [InstCombine] Move gep of phi fold into separate function
Vitaly Buka via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 6 13:35:17 PST 2024
I suspect that this one is caused by the patch
https://lab.llvm.org/buildbot/#/builders/55/builds/3982
On Thu, Dec 5, 2024 at 6:21 AM Nikita Popov via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
>
> Author: Nikita Popov
> Date: 2024-12-05T15:20:56+01:00
> New Revision: f7685af4a5bd188e6d548967d818d8569f10a70d
>
> URL:
> https://github.com/llvm/llvm-project/commit/f7685af4a5bd188e6d548967d818d8569f10a70d
> DIFF:
> https://github.com/llvm/llvm-project/commit/f7685af4a5bd188e6d548967d818d8569f10a70d.diff
>
> LOG: [InstCombine] Move gep of phi fold into separate function
>
> This makes sure that an early return during this fold doesn't end
> up skipping later gep folds.
>
> Added:
>
>
> Modified:
> llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
> llvm/test/Analysis/ValueTracking/phi-known-bits.ll
> llvm/test/Transforms/InstCombine/gepphigep.ll
> llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
> llvm/test/Transforms/InstCombine/intptr1.ll
> llvm/test/Transforms/InstCombine/intptr2.ll
> llvm/test/Transforms/InstCombine/intptr3.ll
> llvm/test/Transforms/InstCombine/intptr4.ll
> llvm/test/Transforms/InstCombine/intptr5.ll
> llvm/test/Transforms/InstCombine/known-phi-recurse.ll
> llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
> llvm/test/Transforms/InstCombine/phi.ll
> llvm/test/Transforms/InstCombine/sub-gep.ll
> llvm/test/Transforms/LoopUnroll/peel-loop.ll
> llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
> llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
> llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
> llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
> llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
> llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
> llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
> llvm/test/Transforms/LoopVectorize/X86/small-size.ll
> llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
> llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
> llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
> llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
> llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
>
> llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
> llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
> llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
> llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
> llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
>
> Removed:
>
>
>
>
> ################################################################################
> diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
> b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
> index 6c60fefe02e653..ac9a4fdcf304d4 100644
> --- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
> +++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
> @@ -2756,6 +2756,111 @@ static bool
> shouldCanonicalizeGEPToPtrAdd(GetElementPtrInst &GEP) {
> });
> }
>
> +static Instruction *foldGEPOfPhi(GetElementPtrInst &GEP, PHINode *PN,
> + IRBuilderBase &Builder) {
> + auto *Op1 = dyn_cast<GetElementPtrInst>(PN->getOperand(0));
> + if (!Op1)
> + return nullptr;
> +
> + // Don't fold a GEP into itself through a PHI node. This can only happen
> + // through the back-edge of a loop. Folding a GEP into itself means that
> + // the value of the previous iteration needs to be stored in the
> meantime,
> + // thus requiring an additional register variable to be live, but not
> + // actually achieving anything (the GEP still needs to be executed once
> per
> + // loop iteration).
> + if (Op1 == &GEP)
> + return nullptr;
> +
> + int DI = -1;
> +
> + for (auto I = PN->op_begin()+1, E = PN->op_end(); I !=E; ++I) {
> + auto *Op2 = dyn_cast<GetElementPtrInst>(*I);
> + if (!Op2 || Op1->getNumOperands() != Op2->getNumOperands() ||
> + Op1->getSourceElementType() != Op2->getSourceElementType())
> + return nullptr;
> +
> + // As for Op1 above, don't try to fold a GEP into itself.
> + if (Op2 == &GEP)
> + return nullptr;
> +
> + // Keep track of the type as we walk the GEP.
> + Type *CurTy = nullptr;
> +
> + for (unsigned J = 0, F = Op1->getNumOperands(); J != F; ++J) {
> + if (Op1->getOperand(J)->getType() != Op2->getOperand(J)->getType())
> + return nullptr;
> +
> + if (Op1->getOperand(J) != Op2->getOperand(J)) {
> + if (DI == -1) {
> + // We have not seen any
> diff erences yet in the GEPs feeding the
> + // PHI yet, so we record this one if it is allowed to be a
> + // variable.
> +
> + // The first two arguments can vary for any GEP, the rest have
> to be
> + // static for struct slots
> + if (J > 1) {
> + assert(CurTy && "No current type?");
> + if (CurTy->isStructTy())
> + return nullptr;
> + }
> +
> + DI = J;
> + } else {
> + // The GEP is
> diff erent by more than one input. While this could be
> + // extended to support GEPs that vary by more than one variable
> it
> + // doesn't make sense since it greatly increases the complexity
> and
> + // would result in an R+R+R addressing mode which no backend
> + // directly supports and would need to be broken into several
> + // simpler instructions anyway.
> + return nullptr;
> + }
> + }
> +
> + // Sink down a layer of the type for the next iteration.
> + if (J > 0) {
> + if (J == 1) {
> + CurTy = Op1->getSourceElementType();
> + } else {
> + CurTy =
> + GetElementPtrInst::getTypeAtIndex(CurTy,
> Op1->getOperand(J));
> + }
> + }
> + }
> + }
> +
> + // If not all GEPs are identical we'll have to create a new PHI node.
> + // Check that the old PHI node has only one use so that it will get
> + // removed.
> + if (DI != -1 && !PN->hasOneUse())
> + return nullptr;
> +
> + auto *NewGEP = cast<GetElementPtrInst>(Op1->clone());
> + if (DI == -1) {
> + // All the GEPs feeding the PHI are identical. Clone one down into our
> + // BB so that it can be merged with the current GEP.
> + } else {
> + // All the GEPs feeding the PHI
> diff er at a single offset. Clone a GEP
> + // into the current block so it can be merged, and create a new PHI to
> + // set that index.
> + PHINode *NewPN;
> + {
> + IRBuilderBase::InsertPointGuard Guard(Builder);
> + Builder.SetInsertPoint(PN);
> + NewPN = Builder.CreatePHI(Op1->getOperand(DI)->getType(),
> + PN->getNumOperands());
> + }
> +
> + for (auto &I : PN->operands())
> + NewPN->addIncoming(cast<GEPOperator>(I)->getOperand(DI),
> + PN->getIncomingBlock(I));
> +
> + NewGEP->setOperand(DI, NewPN);
> + }
> +
> + NewGEP->insertBefore(*GEP.getParent(),
> GEP.getParent()->getFirstInsertionPt());
> + return NewGEP;
> +}
> +
> Instruction *InstCombinerImpl::visitGetElementPtrInst(GetElementPtrInst
> &GEP) {
> Value *PtrOp = GEP.getOperand(0);
> SmallVector<Value *, 8> Indices(GEP.indices());
> @@ -2846,107 +2951,8 @@ Instruction
> *InstCombinerImpl::visitGetElementPtrInst(GetElementPtrInst &GEP) {
>
> // Check to see if the inputs to the PHI node are getelementptr
> instructions.
> if (auto *PN = dyn_cast<PHINode>(PtrOp)) {
> - auto *Op1 = dyn_cast<GetElementPtrInst>(PN->getOperand(0));
> - if (!Op1)
> - return nullptr;
> -
> - // Don't fold a GEP into itself through a PHI node. This can only
> happen
> - // through the back-edge of a loop. Folding a GEP into itself means
> that
> - // the value of the previous iteration needs to be stored in the
> meantime,
> - // thus requiring an additional register variable to be live, but not
> - // actually achieving anything (the GEP still needs to be executed
> once per
> - // loop iteration).
> - if (Op1 == &GEP)
> - return nullptr;
> -
> - int DI = -1;
> -
> - for (auto I = PN->op_begin()+1, E = PN->op_end(); I !=E; ++I) {
> - auto *Op2 = dyn_cast<GetElementPtrInst>(*I);
> - if (!Op2 || Op1->getNumOperands() != Op2->getNumOperands() ||
> - Op1->getSourceElementType() != Op2->getSourceElementType())
> - return nullptr;
> -
> - // As for Op1 above, don't try to fold a GEP into itself.
> - if (Op2 == &GEP)
> - return nullptr;
> -
> - // Keep track of the type as we walk the GEP.
> - Type *CurTy = nullptr;
> -
> - for (unsigned J = 0, F = Op1->getNumOperands(); J != F; ++J) {
> - if (Op1->getOperand(J)->getType() !=
> Op2->getOperand(J)->getType())
> - return nullptr;
> -
> - if (Op1->getOperand(J) != Op2->getOperand(J)) {
> - if (DI == -1) {
> - // We have not seen any
> diff erences yet in the GEPs feeding the
> - // PHI yet, so we record this one if it is allowed to be a
> - // variable.
> -
> - // The first two arguments can vary for any GEP, the rest
> have to be
> - // static for struct slots
> - if (J > 1) {
> - assert(CurTy && "No current type?");
> - if (CurTy->isStructTy())
> - return nullptr;
> - }
> -
> - DI = J;
> - } else {
> - // The GEP is
> diff erent by more than one input. While this could be
> - // extended to support GEPs that vary by more than one
> variable it
> - // doesn't make sense since it greatly increases the
> complexity and
> - // would result in an R+R+R addressing mode which no backend
> - // directly supports and would need to be broken into several
> - // simpler instructions anyway.
> - return nullptr;
> - }
> - }
> -
> - // Sink down a layer of the type for the next iteration.
> - if (J > 0) {
> - if (J == 1) {
> - CurTy = Op1->getSourceElementType();
> - } else {
> - CurTy =
> - GetElementPtrInst::getTypeAtIndex(CurTy,
> Op1->getOperand(J));
> - }
> - }
> - }
> - }
> -
> - // If not all GEPs are identical we'll have to create a new PHI node.
> - // Check that the old PHI node has only one use so that it will get
> - // removed.
> - if (DI != -1 && !PN->hasOneUse())
> - return nullptr;
> -
> - auto *NewGEP = cast<GetElementPtrInst>(Op1->clone());
> - if (DI == -1) {
> - // All the GEPs feeding the PHI are identical. Clone one down into
> our
> - // BB so that it can be merged with the current GEP.
> - } else {
> - // All the GEPs feeding the PHI
> diff er at a single offset. Clone a GEP
> - // into the current block so it can be merged, and create a new PHI
> to
> - // set that index.
> - PHINode *NewPN;
> - {
> - IRBuilderBase::InsertPointGuard Guard(Builder);
> - Builder.SetInsertPoint(PN);
> - NewPN = Builder.CreatePHI(Op1->getOperand(DI)->getType(),
> - PN->getNumOperands());
> - }
> -
> - for (auto &I : PN->operands())
> - NewPN->addIncoming(cast<GEPOperator>(I)->getOperand(DI),
> - PN->getIncomingBlock(I));
> -
> - NewGEP->setOperand(DI, NewPN);
> - }
> -
> - NewGEP->insertBefore(*GEP.getParent(),
> GEP.getParent()->getFirstInsertionPt());
> - return replaceOperand(GEP, 0, NewGEP);
> + if (Value *NewPtrOp = foldGEPOfPhi(GEP, PN, Builder))
> + return replaceOperand(GEP, 0, NewPtrOp);
> }
>
> if (auto *Src = dyn_cast<GEPOperator>(PtrOp))
>
> diff --git a/llvm/test/Analysis/ValueTracking/phi-known-bits.ll
> b/llvm/test/Analysis/ValueTracking/phi-known-bits.ll
> index 11eda42dc623ba..84220832f068f1 100644
> --- a/llvm/test/Analysis/ValueTracking/phi-known-bits.ll
> +++ b/llvm/test/Analysis/ValueTracking/phi-known-bits.ll
> @@ -436,7 +436,7 @@ define i1 @recursiveGEP_withPtrSub1(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -467,7 +467,7 @@ define i1
> @recursiveGEP_withPtrSub1_PhiOperandsCommuted(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[VAL1:%.*]], [[ENTRY:%.*]]
> ], [ [[TEST_0_I:%.*]], [[WHILE_COND_I]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -498,7 +498,7 @@ define i1
> @recursiveGEP_withPtrSub1_SubOperandsCommuted(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -561,7 +561,7 @@ define i1 @recursiveGEP_withPtrSub3(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[TEST_VAL1]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -594,7 +594,7 @@ define i1
> @recursiveGEP_withPtrSub1_notKnownNonEqual1(ptr %val1, i64 %val2) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -629,7 +629,7 @@ define i1
> @recursiveGEP_withPtrSub1_notKnownNonEqual2(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[TEST_VAL1]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -697,7 +697,7 @@ define i1 @recursiveGEP_withPtrSub_maybeZero(ptr
> %val1) {
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[A_PN_I]], align 2
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> ; CHECK: while.end.i:
> @@ -867,7 +867,7 @@ define i1
> @recursiveGEP_withPtrSub_noninboundSameDefStartAndB(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[TEST]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -903,7 +903,7 @@ define i1
> @recursiveGEP_withPtrSub_noninboundSameStartAndB(ptr %val1) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[TEST]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -1004,7 +1004,7 @@ define i1 @recursiveGEP_orcmp(ptr %val1, i64 %val2) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -1036,7 +1036,7 @@ define i1 @recursiveGEP_orcmp_orOperandsCommuted(ptr
> %val1, i64 %val2) {
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -1069,7 +1069,7 @@ define i1 @recursiveGEP_orcmpMultiUse(ptr %val1, i64
> %val2, ptr %dv1, ptr %dv2)
> ; CHECK-NEXT: br label [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[VAL1:%.*]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[TEST_0_I]], align 2
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP0]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
>
> diff --git a/llvm/test/Transforms/InstCombine/gepphigep.ll
> b/llvm/test/Transforms/InstCombine/gepphigep.ll
> index fb4d61182d05c8..6b5dae93c1e047 100644
> --- a/llvm/test/Transforms/InstCombine/gepphigep.ll
> +++ b/llvm/test/Transforms/InstCombine/gepphigep.ll
> @@ -144,7 +144,7 @@ define ptr @test4(i32 %value, ptr %buffer) {
> ; CHECK: loop.body:
> ; CHECK-NEXT: [[BUFFER_PN:%.*]] = phi ptr [ [[BUFFER:%.*]],
> [[LOOP_HEADER]] ], [ [[LOOPPTR:%.*]], [[LOOP_BODY]] ]
> ; CHECK-NEXT: [[NEWVAL:%.*]] = phi i32 [ [[VALUE]], [[LOOP_HEADER]] ],
> [ [[SHR:%.*]], [[LOOP_BODY]] ]
> -; CHECK-NEXT: [[LOOPPTR]] = getelementptr inbounds i8, ptr
> [[BUFFER_PN]], i64 1
> +; CHECK-NEXT: [[LOOPPTR]] = getelementptr inbounds nuw i8, ptr
> [[BUFFER_PN]], i64 1
> ; CHECK-NEXT: [[SHR]] = lshr i32 [[NEWVAL]], 7
> ; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[NEWVAL]], 16383
> ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP_BODY]], label
> [[LOOP_EXIT:%.*]]
> @@ -152,7 +152,7 @@ define ptr @test4(i32 %value, ptr %buffer) {
> ; CHECK-NEXT: br label [[EXIT]]
> ; CHECK: exit:
> ; CHECK-NEXT: [[TMP0:%.*]] = phi ptr [ [[LOOPPTR]], [[LOOP_EXIT]] ], [
> [[BUFFER]], [[ENTRY:%.*]] ]
> -; CHECK-NEXT: [[INCPTR3:%.*]] = getelementptr inbounds i8, ptr
> [[TMP0]], i64 2
> +; CHECK-NEXT: [[INCPTR3:%.*]] = getelementptr inbounds nuw i8, ptr
> [[TMP0]], i64 2
> ; CHECK-NEXT: ret ptr [[INCPTR3]]
> ;
> entry:
> @@ -203,10 +203,10 @@ define void @test5(ptr %idx, ptr %in) #0 {
> ; CHECK-NEXT: [[LNOT:%.*]] = icmp eq i8 [[AND]], 0
> ; CHECK-NEXT: br i1 [[LNOT]], label [[WHILE_BODY]], label
> [[WHILE_COND_33:%.*]]
> ; CHECK: while.body:
> -; CHECK-NEXT: [[INCDEC_PTR32]] = getelementptr inbounds i8, ptr
> [[PTR]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR32]] = getelementptr inbounds nuw i8, ptr
> [[PTR]], i64 1
> ; CHECK-NEXT: br label [[WHILE_COND]]
> ; CHECK: while.cond.33:
> -; CHECK-NEXT: [[INCDEC_PTR34:%.*]] = getelementptr inbounds i8, ptr
> [[PTR]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR34:%.*]] = getelementptr inbounds nuw i8,
> ptr [[PTR]], i64 1
> ; CHECK-NEXT: br label [[WHILE_COND_57:%.*]]
> ; CHECK: while.cond.57:
> ; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[INCDEC_PTR34]], align 1
>
> diff --git a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
> b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
> index bf1deadcf620f6..53c9736da59c4d 100644
> --- a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
> +++ b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
> @@ -136,7 +136,7 @@ define ptr @test3_no_inbounds1(ptr %A, i32 %Offset) {
> ; CHECK: bb:
> ; CHECK-NEXT: [[RHS:%.*]] = phi ptr [ [[RHS_NEXT:%.*]], [[BB]] ], [
> [[TMP]], [[ENTRY:%.*]] ]
> ; CHECK-NEXT: [[LHS:%.*]] = getelementptr inbounds nuw i8, ptr [[A]],
> i32 400
> -; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds i8, ptr [[RHS]],
> i32 4
> +; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[RHS]], i32 4
> ; CHECK-NEXT: [[COND:%.*]] = icmp ult ptr [[LHS]], [[RHS]]
> ; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
> ; CHECK: bb2:
> @@ -194,7 +194,7 @@ define ptr @test3_no_inbounds3(ptr %A, i32 %Offset) {
> ; CHECK: bb:
> ; CHECK-NEXT: [[RHS:%.*]] = phi ptr [ [[RHS_NEXT:%.*]], [[BB]] ], [
> [[TMP]], [[ENTRY:%.*]] ]
> ; CHECK-NEXT: [[LHS:%.*]] = getelementptr i8, ptr [[A]], i32 400
> -; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds i8, ptr [[RHS]],
> i32 4
> +; CHECK-NEXT: [[RHS_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[RHS]], i32 4
> ; CHECK-NEXT: [[COND:%.*]] = icmp ult ptr [[LHS]], [[RHS]]
> ; CHECK-NEXT: br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
> ; CHECK: bb2:
>
> diff --git a/llvm/test/Transforms/InstCombine/intptr1.ll
> b/llvm/test/Transforms/InstCombine/intptr1.ll
> index 6758180a4b81af..2f57dc619dbb18 100644
> --- a/llvm/test/Transforms/InstCombine/intptr1.ll
> +++ b/llvm/test/Transforms/InstCombine/intptr1.ll
> @@ -16,8 +16,8 @@ define void @test1(ptr %a, ptr readnone %a_end, ptr
> %b.i64) {
> ; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[B_ADDR_02_PTR]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[ADD]] = getelementptr inbounds i8, ptr
> [[B_ADDR_02_PTR]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_02_PTR]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
> @@ -69,7 +69,7 @@ define void @test1_neg(ptr %a, ptr readnone %a_end, ptr
> %b.i64) {
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> ; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr [[A]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
> @@ -122,8 +122,8 @@ define void @test2(ptr %a, ptr readnone %a_end, ptr
> %b.float) {
> ; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[B_ADDR_02_PTR]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[ADD]] = getelementptr inbounds i8, ptr
> [[B_ADDR_02_PTR]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_02_PTR]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
> @@ -172,8 +172,8 @@ define void @test3(ptr %a, ptr readnone %a_end, ptr
> %b.i8p) {
> ; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[B_ADDR_02_PTR]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[ADD]] = getelementptr inbounds i8, ptr
> [[B_ADDR_02_PTR]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_02_PTR]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
> @@ -221,8 +221,8 @@ define void @test4(ptr %a, ptr readnone %a_end, ptr
> %b.float) {
> ; CHECK-NEXT: [[I1:%.*]] = load float, ptr [[B_ADDR_02_IN]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[ADD]] = getelementptr inbounds i8, ptr
> [[B_ADDR_02_IN]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_02_IN]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
>
> diff --git a/llvm/test/Transforms/InstCombine/intptr2.ll
> b/llvm/test/Transforms/InstCombine/intptr2.ll
> index c256171142b915..f7bdc0895b6bdb 100644
> --- a/llvm/test/Transforms/InstCombine/intptr2.ll
> +++ b/llvm/test/Transforms/InstCombine/intptr2.ll
> @@ -15,8 +15,8 @@ define void @test1(ptr %a, ptr readnone %a_end, ptr
> %b.i) {
> ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[B_ADDR_02_IN]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[ADD]] = getelementptr inbounds i8, ptr
> [[B_ADDR_02_IN]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[ADD]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_02_IN]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
>
> diff --git a/llvm/test/Transforms/InstCombine/intptr3.ll
> b/llvm/test/Transforms/InstCombine/intptr3.ll
> index 3bb3c7dcb4e1a0..03c89368cd0a43 100644
> --- a/llvm/test/Transforms/InstCombine/intptr3.ll
> +++ b/llvm/test/Transforms/InstCombine/intptr3.ll
> @@ -15,8 +15,8 @@ define void @test(ptr %a, ptr readnone %a_end, i64 %b)
> unnamed_addr {
> ; CHECK-NEXT: [[L:%.*]] = load float, ptr [[B_ADDR_FLOAT]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[L]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds i8, ptr
> [[B_ADDR_FLOAT]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds nuw i8,
> ptr [[B_ADDR_FLOAT]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
> ; CHECK: for.end:
>
> diff --git a/llvm/test/Transforms/InstCombine/intptr4.ll
> b/llvm/test/Transforms/InstCombine/intptr4.ll
> index 5998501d82f4fa..671ed1ccc3dfb3 100644
> --- a/llvm/test/Transforms/InstCombine/intptr4.ll
> +++ b/llvm/test/Transforms/InstCombine/intptr4.ll
> @@ -22,8 +22,8 @@ define void @test(ptr %a, ptr readnone %a_end, i64 %b,
> ptr %bf) unnamed_addr {
> ; CHECK-NEXT: [[L:%.*]] = load float, ptr [[B_ADDR_FLOAT]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[L]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds i8, ptr
> [[B_ADDR_I64_PTR]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds nuw i8,
> ptr [[B_ADDR_I64_PTR]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
> ; CHECK: for.end:
>
> diff --git a/llvm/test/Transforms/InstCombine/intptr5.ll
> b/llvm/test/Transforms/InstCombine/intptr5.ll
> index f992886208f671..fa7a9a785231b6 100644
> --- a/llvm/test/Transforms/InstCombine/intptr5.ll
> +++ b/llvm/test/Transforms/InstCombine/intptr5.ll
> @@ -15,7 +15,7 @@ define void @test(ptr %a, ptr readnone %a_end, i64 %b,
> ptr %bf) unnamed_addr {
> ; CHECK: for.body.preheader:
> ; CHECK-NEXT: [[B_PHI:%.*]] = phi ptr [ [[TMP0]], [[BB1]] ], [
> [[BF:%.*]], [[BB2]] ]
> ; CHECK-NEXT: switch i64 [[B]], label [[FOR_BODY:%.*]] [
> -; CHECK-NEXT: i64 1, label [[FOR_BODY]]
> +; CHECK-NEXT: i64 1, label [[FOR_BODY]]
> ; CHECK-NEXT: ]
> ; CHECK: for.body:
> ; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ], [ [[A]],
> [[FOR_BODY_PREHEADER]] ]
> @@ -24,8 +24,8 @@ define void @test(ptr %a, ptr readnone %a_end, i64 %b,
> ptr %bf) unnamed_addr {
> ; CHECK-NEXT: [[L:%.*]] = load float, ptr [[B_ADDR_FLOAT]], align 4
> ; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[L]], 4.200000e+01
> ; CHECK-NEXT: store float [[MUL_I]], ptr [[A_ADDR_03]], align 4
> -; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds i8, ptr
> [[B_ADDR_I64_PTR]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_03]], i64 4
> +; CHECK-NEXT: [[B_ADDR_FLOAT_INC]] = getelementptr inbounds nuw i8,
> ptr [[B_ADDR_I64_PTR]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_03]], i64 4
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ult ptr [[INCDEC_PTR]], [[A_END]]
> ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
> ; CHECK: for.end:
>
> diff --git a/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
> b/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
> index fd3728324b8ea8..9008ee9ca8e061 100644
> --- a/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
> +++ b/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
> @@ -175,7 +175,7 @@ define i32 @knownbits_phi_select_test1(ptr %p1, ptr
> %p2, i8 %x) {
> ; CHECK-NEXT: [[CMP6:%.*]] = icmp eq i8 [[INDVAR1]], 34
> ; CHECK-NEXT: [[EXT3:%.*]] = zext i1 [[CMP6]] to i32
> ; CHECK-NEXT: [[INDVAR5_NEXT]] = xor i32 [[INDVAR5]], [[EXT3]]
> -; CHECK-NEXT: [[INDVAR3_NEXT]] = getelementptr inbounds i8, ptr
> [[INDVAR3]], i64 1
> +; CHECK-NEXT: [[INDVAR3_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[INDVAR3]], i64 1
> ; CHECK-NEXT: [[LOAD2]] = load i8, ptr [[INDVAR3_NEXT]], align 1
> ; CHECK-NEXT: br label [[LOOP]]
> ; CHECK: exit:
>
> diff --git
> a/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
> b/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
> index 66c14a66206d63..5d162e5dd770bd 100644
> --- a/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
> +++ b/llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
> @@ -105,7 +105,7 @@ define i32 @test_gep_and_bitcast_phi(i1 %cond, i1
> %cond2, i1 %cond3) {
> ; ALL: bb4:
> ; ALL-NEXT: br label [[EXIT]]
> ; ALL: exit:
> -; ALL-NEXT: [[PTR_TYPED:%.*]] = getelementptr inbounds i8, ptr
> [[OBJ]], i64 16
> +; ALL-NEXT: [[PTR_TYPED:%.*]] = getelementptr inbounds nuw i8, ptr
> [[OBJ]], i64 16
> ; ALL-NEXT: [[RES_PHI:%.*]] = load i32, ptr [[PTR_TYPED]], align 4
> ; ALL-NEXT: store i32 1, ptr [[PTR_TYPED]], align 4
> ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND3:%.*]], i32 [[RES_PHI]],
> i32 1
>
> diff --git a/llvm/test/Transforms/InstCombine/phi.ll
> b/llvm/test/Transforms/InstCombine/phi.ll
> index 687cacfb442d22..e3bf5ef673819d 100644
> --- a/llvm/test/Transforms/InstCombine/phi.ll
> +++ b/llvm/test/Transforms/InstCombine/phi.ll
> @@ -1756,7 +1756,7 @@ define i1 @pr57488_icmp_of_phi(ptr %ptr.base, i64
> %len) {
> ; CHECK: loop:
> ; CHECK-NEXT: [[ACCUM:%.*]] = phi i1 [ [[AND:%.*]], [[LOOP]] ], [
> true, [[START:%.*]] ]
> ; CHECK-NEXT: [[PTR:%.*]] = phi ptr [ [[PTR_NEXT:%.*]], [[LOOP]] ], [
> [[PTR_BASE]], [[START]] ]
> -; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR]],
> i64 8
> +; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[PTR]], i64 8
> ; CHECK-NEXT: [[VAL:%.*]] = load i64, ptr [[PTR]], align 8
> ; CHECK-NEXT: [[VAL_ZERO:%.*]] = icmp eq i64 [[VAL]], 0
> ; CHECK-NEXT: [[AND]] = and i1 [[ACCUM]], [[VAL_ZERO]]
> @@ -1895,7 +1895,7 @@ define void @simplify_context_instr(ptr %ptr.base,
> i64 %n) {
> ; CHECK-NEXT: call void @use(i32 [[SEL]])
> ; CHECK-NEXT: br label [[LATCH]]
> ; CHECK: latch:
> -; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR]],
> i64 1
> +; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[PTR]], i64 1
> ; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[PTR_END]]
> ; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[EXIT:%.*]], label [[LOOP]]
> ; CHECK: exit:
>
> diff --git a/llvm/test/Transforms/InstCombine/sub-gep.ll
> b/llvm/test/Transforms/InstCombine/sub-gep.ll
> index 5f336b49323ec0..3f8728d3a43816 100644
> --- a/llvm/test/Transforms/InstCombine/sub-gep.ll
> +++ b/llvm/test/Transforms/InstCombine/sub-gep.ll
> @@ -771,7 +771,7 @@ define i1 @_gep_phi1(ptr %str1) {
> ; CHECK-NEXT: br i1 [[CMP1_I]], label [[_Z3FOOPKC_EXIT]], label
> [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[STR1]], [[LOR_LHS_FALSE_I]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[TEST_0_I]], align 1
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP1]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
> @@ -820,7 +820,7 @@ define i1 @_gep_phi2(ptr %str1, i64 %val2) {
> ; CHECK-NEXT: br i1 [[CMP1_I]], label [[_Z3FOOPKC_EXIT]], label
> [[WHILE_COND_I:%.*]]
> ; CHECK: while.cond.i:
> ; CHECK-NEXT: [[A_PN_I:%.*]] = phi ptr [ [[TEST_0_I:%.*]],
> [[WHILE_COND_I]] ], [ [[STR1]], [[LOR_LHS_FALSE_I]] ]
> -; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds i8, ptr
> [[A_PN_I]], i64 1
> +; CHECK-NEXT: [[TEST_0_I]] = getelementptr inbounds nuw i8, ptr
> [[A_PN_I]], i64 1
> ; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[TEST_0_I]], align 1
> ; CHECK-NEXT: [[CMP3_NOT_I:%.*]] = icmp eq i8 [[TMP1]], 0
> ; CHECK-NEXT: br i1 [[CMP3_NOT_I]], label [[WHILE_END_I:%.*]], label
> [[WHILE_COND_I]]
>
> diff --git a/llvm/test/Transforms/LoopUnroll/peel-loop.ll
> b/llvm/test/Transforms/LoopUnroll/peel-loop.ll
> index 82ac7a90a82d8b..0f58e705b448ad 100644
> --- a/llvm/test/Transforms/LoopUnroll/peel-loop.ll
> +++ b/llvm/test/Transforms/LoopUnroll/peel-loop.ll
> @@ -29,7 +29,7 @@ define void @basic(ptr %p, i32 %k) #0 {
> ; CHECK: for.body:
> ; CHECK-NEXT: [[I_05:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 3, [[FOR_BODY_PEEL7]] ]
> ; CHECK-NEXT: [[P_ADDR_04:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[INCDEC_PTR_PEEL8]], [[FOR_BODY_PEEL7]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[P_ADDR_04]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[P_ADDR_04]], i64 4
> ; CHECK-NEXT: store i32 [[I_05]], ptr [[P_ADDR_04]], align 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_05]], 1
> ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[K]]
> @@ -89,7 +89,7 @@ define i32 @output(ptr %p, i32 %k) #0 {
> ; CHECK: for.body:
> ; CHECK-NEXT: [[I_05:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 3, [[FOR_BODY_PEEL7]] ]
> ; CHECK-NEXT: [[P_ADDR_04:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[INCDEC_PTR_PEEL8]], [[FOR_BODY_PEEL7]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[P_ADDR_04]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[P_ADDR_04]], i64 4
> ; CHECK-NEXT: store i32 [[I_05]], ptr [[P_ADDR_04]], align 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_05]], 1
> ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[K]]
>
> diff --git a/llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
> b/llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
> index da1808fc278c09..40d6ddc27370e7 100644
> --- a/llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
> +++ b/llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
> @@ -57,15 +57,15 @@ define void @_Z3fn1v(ptr %r, ptr %a) #0 {
> ; CHECK-NEXT: [[CMP_PROL:%.*]] = icmp eq i8 [[TMP3_PROL]], 0
> ; CHECK-NEXT: br i1 [[CMP_PROL]], label %[[IF_THEN_PROL:.*]], label
> %[[FOR_INC_PROL:.*]]
> ; CHECK: [[IF_THEN_PROL]]:
> -; CHECK-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i8, ptr
> [[R_022]], i64 2
> +; CHECK-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds nuw i8,
> ptr [[R_022]], i64 2
> ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX_PROL]], align 2
> ; CHECK-NEXT: store i16 0, ptr [[R_022]], align 2
> -; CHECK-NEXT: [[ARRAYIDX5_PROL:%.*]] = getelementptr inbounds i8, ptr
> [[R_022]], i64 4
> +; CHECK-NEXT: [[ARRAYIDX5_PROL:%.*]] = getelementptr inbounds nuw i8,
> ptr [[R_022]], i64 4
> ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX5_PROL]], align 2
> ; CHECK-NEXT: br label %[[FOR_INC_PROL]]
> ; CHECK: [[FOR_INC_PROL]]:
> -; CHECK-NEXT: [[INCDEC_PTR_PROL:%.*]] = getelementptr inbounds i8, ptr
> [[A_021]], i64 1
> -; CHECK-NEXT: [[ADD_PTR_PROL:%.*]] = getelementptr inbounds i8, ptr
> [[R_022]], i64 6
> +; CHECK-NEXT: [[INCDEC_PTR_PROL:%.*]] = getelementptr inbounds nuw i8,
> ptr [[A_021]], i64 1
> +; CHECK-NEXT: [[ADD_PTR_PROL:%.*]] = getelementptr inbounds nuw i8,
> ptr [[R_022]], i64 6
> ; CHECK-NEXT: br label %[[FOR_BODY3_PROL_LOOPEXIT]]
> ; CHECK: [[FOR_BODY3_PROL_LOOPEXIT]]:
> ; CHECK-NEXT: [[ADD_PTR_LCSSA_UNR]] = phi ptr [ poison,
> %[[FOR_BODY3_PREHEADER]] ], [ [[ADD_PTR_PROL]], %[[FOR_INC_PROL]] ]
> @@ -82,29 +82,29 @@ define void @_Z3fn1v(ptr %r, ptr %a) #0 {
> ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP3]], 0
> ; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN:.*]], label
> %[[FOR_INC:.*]]
> ; CHECK: [[IF_THEN]]:
> -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr
> [[R_117]], i64 2
> +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr
> [[R_117]], i64 2
> ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX]], align 2
> ; CHECK-NEXT: store i16 0, ptr [[R_117]], align 2
> -; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i8, ptr
> [[R_117]], i64 4
> +; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw i8, ptr
> [[R_117]], i64 4
> ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX5]], align 2
> ; CHECK-NEXT: br label %[[FOR_INC]]
> ; CHECK: [[FOR_INC]]:
> -; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i8, ptr
> [[A_116]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i8, ptr
> [[A_116]], i64 1
> ; CHECK-NEXT: [[DEC18_1]] = add nsw i32 [[DEC18_IN]], -2
> ; CHECK-NEXT: [[TMP3_1:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1
> ; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i8 [[TMP3_1]], 0
> ; CHECK-NEXT: br i1 [[CMP_1]], label %[[IF_THEN_1:.*]], label
> %[[FOR_INC_1]]
> ; CHECK: [[IF_THEN_1]]:
> -; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr
> [[R_117]], i64 6
> -; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i8, ptr
> [[R_117]], i64 8
> +; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr
> [[R_117]], i64 6
> +; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds nuw i8, ptr
> [[R_117]], i64 8
> ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX_1]], align 2
> ; CHECK-NEXT: store i16 0, ptr [[ADD_PTR]], align 2
> -; CHECK-NEXT: [[ARRAYIDX5_1:%.*]] = getelementptr inbounds i8, ptr
> [[R_117]], i64 10
> +; CHECK-NEXT: [[ARRAYIDX5_1:%.*]] = getelementptr inbounds nuw i8, ptr
> [[R_117]], i64 10
> ; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX5_1]], align 2
> ; CHECK-NEXT: br label %[[FOR_INC_1]]
> ; CHECK: [[FOR_INC_1]]:
> -; CHECK-NEXT: [[INCDEC_PTR_1]] = getelementptr inbounds i8, ptr
> [[A_116]], i64 2
> -; CHECK-NEXT: [[ADD_PTR_1]] = getelementptr inbounds i8, ptr
> [[R_117]], i64 12
> +; CHECK-NEXT: [[INCDEC_PTR_1]] = getelementptr inbounds nuw i8, ptr
> [[A_116]], i64 2
> +; CHECK-NEXT: [[ADD_PTR_1]] = getelementptr inbounds nuw i8, ptr
> [[R_117]], i64 12
> ; CHECK-NEXT: [[TOBOOL2_1:%.*]] = icmp eq i32 [[DEC18_1]], 0
> ; CHECK-NEXT: br i1 [[TOBOOL2_1]], label
> %[[FOR_COND_LOOPEXIT_LOOPEXIT]], label %[[FOR_BODY3]], !llvm.loop
> [[LOOP0:![0-9]+]]
> ; CHECK: [[FOR_END6]]:
>
> diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
> b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
> index 89d5ba6e879df7..25805813ae379e 100644
> --- a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
> +++ b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
> @@ -7,10 +7,6 @@ target datalayout =
> "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
> target triple = "aarch64--linux-gnu"
>
> ; CHECK-COST-LABEL: sadd
> -; CHECK-COST: Found an estimated cost of 6 for VF 1 For instruction: %1
> = tail call i16 @llvm.sadd.sat.i16(i16 %0, i16 %offset)
> -; CHECK-COST: Cost of 4 for VF 2: WIDEN-INTRINSIC ir<%1> = call
> llvm.sadd.sat(ir<%0>, ir<%offset>)
> -; CHECK-COST: Cost of 1 for VF 4: WIDEN-INTRINSIC ir<%1> = call
> llvm.sadd.sat(ir<%0>, ir<%offset>)
> -; CHECK-COST: Cost of 1 for VF 8: WIDEN-INTRINSIC ir<%1> = call
> llvm.sadd.sat(ir<%0>, ir<%offset>)
>
> define void @saddsat(ptr nocapture readonly %pSrc, i16 signext %offset,
> ptr nocapture noalias %pDst, i32 %blockSize) #0 {
> ; CHECK-LABEL: @saddsat(
> @@ -95,10 +91,10 @@ define void @saddsat(ptr nocapture readonly %pSrc, i16
> signext %offset, ptr noca
> ; CHECK-NEXT: [[BLKCNT_09:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PSRC_ADDR_08:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL11]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR3:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL14]], [[VEC_EPILOG_SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_08]], i64 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_08]], i64 2
> ; CHECK-NEXT: [[TMP12:%.*]] = load i16, ptr [[PSRC_ADDR_08]], align 2
> ; CHECK-NEXT: [[TMP13:%.*]] = tail call i16 @llvm.sadd.sat.i16(i16
> [[TMP12]], i16 [[OFFSET]])
> -; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_07]], i64 2
> +; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_07]], i64 2
> ; CHECK-NEXT: store i16 [[TMP13]], ptr [[PDST_ADDR_07]], align 2
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
> @@ -128,11 +124,6 @@ while.end: ;
> preds = %while.body, %entry
> }
>
> ; CHECK-COST-LABEL: umin
> -; CHECK-COST: Found an estimated cost of 2 for VF 1 For instruction: %1
> = tail call i8 @llvm.umin.i8(i8 %0, i8 %offset)
> -; CHECK-COST: Cost of 1 for VF 2: WIDEN-INTRINSIC ir<%1> = call
> llvm.umin(ir<%0>, ir<%offset>)
> -; CHECK-COST: Cost of 1 for VF 4: WIDEN-INTRINSIC ir<%1> = call
> llvm.umin(ir<%0>, ir<%offset>)
> -; CHECK-COST: Cost of 1 for VF 8: WIDEN-INTRINSIC ir<%1> = call
> llvm.umin(ir<%0>, ir<%offset>)
> -; CHECK-COST: Cost of 1 for VF 16: WIDEN-INTRINSIC ir<%1> = call
> llvm.umin(ir<%0>, ir<%offset>)
>
> define void @umin(ptr nocapture readonly %pSrc, i8 signext %offset, ptr
> nocapture noalias %pDst, i32 %blockSize) #0 {
> ; CHECK-LABEL: @umin(
> @@ -209,10 +200,10 @@ define void @umin(ptr nocapture readonly %pSrc, i8
> signext %offset, ptr nocaptur
> ; CHECK-NEXT: [[BLKCNT_09:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PSRC_ADDR_08:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL10]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR3:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL13]], [[VEC_EPILOG_SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_08]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_08]], i64 1
> ; CHECK-NEXT: [[TMP8:%.*]] = load i8, ptr [[PSRC_ADDR_08]], align 2
> ; CHECK-NEXT: [[TMP9:%.*]] = tail call i8 @llvm.umin.i8(i8 [[TMP8]],
> i8 [[OFFSET]])
> -; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_07]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_07]], i64 1
> ; CHECK-NEXT: store i8 [[TMP9]], ptr [[PDST_ADDR_07]], align 2
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
>
> diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
> b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
> index 6d99da49d2f73b..4b096e17a4fa0e 100644
> --- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
> +++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
> @@ -75,9 +75,9 @@ define void @widen_ptr_phi_unrolled(ptr noalias
> nocapture %a, ptr noalias nocapt
> ; CHECK: for.body:
> ; CHECK-NEXT: [[PTR_014:%.*]] = phi ptr [ [[INCDEC_PTR1:%.*]],
> [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[I_013:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [
> [[BC_RESUME_VAL1]], [[SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i8, ptr
> [[PTR_014]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i8, ptr
> [[PTR_014]], i64 4
> ; CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[PTR_014]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i8, ptr
> [[PTR_014]], i64 8
> +; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds nuw i8, ptr
> [[PTR_014]], i64 8
> ; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[INCDEC_PTR]], align 4
> ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], 1
> ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr
> [[A]], i64 [[I_013]]
> @@ -181,8 +181,8 @@ define void @widen_2ptrs_phi_unrolled(ptr noalias
> nocapture %dst, ptr noalias no
> ; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[S_010]], align 4
> ; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[TMP14]], 1
> ; CHECK-NEXT: store i32 [[MUL]], ptr [[D_09]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[D_09]], i64 4
> -; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i8, ptr
> [[S_010]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[D_09]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds nuw i8, ptr
> [[S_010]], i64 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_011]], 1
> ; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]]
> ; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]],
> label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
> @@ -273,8 +273,8 @@ define i32 @pointer_iv_mixed(ptr noalias %a, ptr
> noalias %b, i64 %n) #0 {
> ; CHECK-NEXT: [[VAR1:%.*]] = load i32, ptr [[P]], align 8
> ; CHECK-NEXT: [[VAR2]] = add i32 [[VAR1]], [[VAR0]]
> ; CHECK-NEXT: store ptr [[P]], ptr [[Q]], align 8
> -; CHECK-NEXT: [[VAR3]] = getelementptr inbounds i8, ptr [[P]], i64 4
> -; CHECK-NEXT: [[VAR4]] = getelementptr inbounds i8, ptr [[Q]], i64 8
> +; CHECK-NEXT: [[VAR3]] = getelementptr inbounds nuw i8, ptr [[P]], i64
> 4
> +; CHECK-NEXT: [[VAR4]] = getelementptr inbounds nuw i8, ptr [[Q]], i64
> 8
> ; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
> ; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]
> ; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END]],
> !llvm.loop [[LOOP8:![0-9]+]]
>
> diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
> b/llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
> index fde594d0483613..0595bb31a58d80 100644
> --- a/llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
> +++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
> @@ -49,14 +49,14 @@ define void @arm_abs_q7(ptr nocapture readonly %pSrc,
> ptr nocapture %pDst, i32 %
> ; CHECK-NEXT: [[PSRC_ADDR_022:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[BLKCNT_021:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_020:%.*]] = phi ptr [ [[INCDEC_PTR13:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_022]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_022]], i32 1
> ; CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[PSRC_ADDR_022]], align 1
> ; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i8 [[TMP7]], 0
> ; CHECK-NEXT: [[CMP5:%.*]] = icmp eq i8 [[TMP7]], -128
> ; CHECK-NEXT: [[SUB:%.*]] = sub i8 0, [[TMP7]]
> ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP5]], i8 127, i8 [[SUB]]
> ; CHECK-NEXT: [[COND11:%.*]] = select i1 [[CMP1]], i8 [[TMP7]], i8
> [[COND]]
> -; CHECK-NEXT: [[INCDEC_PTR13]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_020]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR13]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_020]], i32 1
> ; CHECK-NEXT: store i8 [[COND11]], ptr [[PDST_ADDR_020]], align 1
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_021]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
> @@ -144,14 +144,14 @@ define void @arm_abs_q15(ptr nocapture readonly
> %pSrc, ptr nocapture %pDst, i32
> ; CHECK-NEXT: [[PSRC_ADDR_023:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[BLKCNT_022:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_021:%.*]] = phi ptr [ [[INCDEC_PTR13:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_023]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_023]], i32 2
> ; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[PSRC_ADDR_023]], align 2
> ; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i16 [[TMP9]], 0
> ; CHECK-NEXT: [[CMP5:%.*]] = icmp eq i16 [[TMP9]], -32768
> ; CHECK-NEXT: [[SUB:%.*]] = sub i16 0, [[TMP9]]
> ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP5]], i16 32767, i16 [[SUB]]
> ; CHECK-NEXT: [[COND11:%.*]] = select i1 [[CMP1]], i16 [[TMP9]], i16
> [[COND]]
> -; CHECK-NEXT: [[INCDEC_PTR13]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_021]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR13]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_021]], i32 2
> ; CHECK-NEXT: store i16 [[COND11]], ptr [[PDST_ADDR_021]], align 2
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_022]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
> @@ -239,14 +239,14 @@ define void @arm_abs_q31(ptr nocapture readonly
> %pSrc, ptr nocapture %pDst, i32
> ; CHECK-NEXT: [[PSRC_ADDR_017:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[BLKCNT_016:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_015:%.*]] = phi ptr [ [[INCDEC_PTR7:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL6]], [[SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_017]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_017]], i32 4
> ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[PSRC_ADDR_017]], align 4
> ; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[TMP9]], 0
> ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP9]], -2147483648
> <(214)%20748-3648>
> ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[TMP9]]
> ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP2]], i32 2147483647
> <(214)%20748-3647>, i32 [[SUB]]
> ; CHECK-NEXT: [[COND6:%.*]] = select i1 [[CMP1]], i32 [[TMP9]], i32
> [[COND]]
> -; CHECK-NEXT: [[INCDEC_PTR7]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_015]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR7]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_015]], i32 4
> ; CHECK-NEXT: store i32 [[COND6]], ptr [[PDST_ADDR_015]], align 4
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_016]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
>
> diff --git
> a/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
> b/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
> index 025b8738f78290..eaec02038fde12 100644
> --- a/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
> +++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
> @@ -65,9 +65,9 @@ define float @test(ptr nocapture readonly %pA, ptr
> nocapture readonly %pB, i32 %
> ; CHECK-NEXT: [[PB_ADDR_019:%.*]] = phi ptr [ [[INCDEC_PTR1:%.*]],
> [[IF_END]] ], [ [[BC_RESUME_VAL2]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[BLOCKSIZE_ADDR_018:%.*]] = phi i32 [ [[DEC:%.*]],
> [[IF_END]] ], [ [[BC_RESUME_VAL4]], [[SCALAR_PH]] ]
> ; CHECK-NEXT: [[ACCUM_017:%.*]] = phi float [ [[ACCUM_1:%.*]],
> [[IF_END]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PA_ADDR_020]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PA_ADDR_020]], i32 4
> ; CHECK-NEXT: [[TMP13:%.*]] = load float, ptr [[PA_ADDR_020]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i8, ptr
> [[PB_ADDR_019]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds nuw i8, ptr
> [[PB_ADDR_019]], i32 4
> ; CHECK-NEXT: [[TMP14:%.*]] = load float, ptr [[PB_ADDR_019]], align 4
> ; CHECK-NEXT: [[CMP2:%.*]] = fcmp fast une float [[TMP13]],
> 0.000000e+00
> ; CHECK-NEXT: [[CMP3:%.*]] = fcmp fast une float [[TMP14]],
> 0.000000e+00
>
> diff --git a/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
> b/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
> index d49639db3bbfcd..07ba7745b34a2f 100644
> --- a/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
> +++ b/llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
> @@ -69,10 +69,10 @@ define hidden void @pointer_phi_v4i32_add2(ptr noalias
> nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 996, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_ADDR_09]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_09]], i32 8
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_09]], i32 8
> ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[Y]]
> ; CHECK-NEXT: store i32 [[ADD]], ptr [[B_ADDR_07]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_07]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_07]], i32 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
> @@ -123,10 +123,10 @@ define hidden void @pointer_phi_v4i32_add3(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 996, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[A_ADDR_09]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_09]], i32 12
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_09]], i32 12
> ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[Y]]
> ; CHECK-NEXT: store i32 [[ADD]], ptr [[B_ADDR_07]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_07]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_07]], i32 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
> @@ -219,10 +219,10 @@ define hidden void @pointer_phi_v8i16_add2(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_010:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 992, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_09:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[L1:%.*]] = load i16, ptr [[A_ADDR_011]], align 2
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_011]], i32 4
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_011]], i32 4
> ; CHECK-NEXT: [[CONV1:%.*]] = add i16 [[L1]], [[TMP0]]
> ; CHECK-NEXT: store i16 [[CONV1]], ptr [[B_ADDR_09]], align 2
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_09]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_09]], i32 2
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_010]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
> @@ -258,10 +258,10 @@ define hidden void @pointer_phi_v8i16_add3(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_010:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]],
> [[FOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_09:%.*]] = phi ptr [ [[B:%.*]], [[ENTRY]] ], [
> [[INCDEC_PTR:%.*]], [[FOR_BODY]] ]
> ; CHECK-NEXT: [[L1:%.*]] = load i16, ptr [[A_ADDR_011]], align 2
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_011]], i32 6
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_011]], i32 6
> ; CHECK-NEXT: [[CONV1:%.*]] = add i16 [[L1]], [[TMP0]]
> ; CHECK-NEXT: store i16 [[CONV1]], ptr [[B_ADDR_09]], align 2
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_09]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_09]], i32 2
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_010]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label [[FOR_BODY]]
> @@ -311,10 +311,10 @@ define hidden void @pointer_phi_v16i8_add1(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_09:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 992, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_08:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[A_ADDR_010]], align 1
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_010]], i32 1
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_010]], i32 1
> ; CHECK-NEXT: [[CONV1:%.*]] = add i8 [[TMP3]], [[TMP0]]
> ; CHECK-NEXT: store i8 [[CONV1]], ptr [[B_ADDR_08]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_08]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_08]], i32 1
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_09]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
> @@ -367,10 +367,10 @@ define hidden void @pointer_phi_v16i8_add2(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_09:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 992, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_08:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[A_ADDR_010]], align 1
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_010]], i32 2
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_010]], i32 2
> ; CHECK-NEXT: [[CONV1:%.*]] = add i8 [[TMP3]], [[TMP0]]
> ; CHECK-NEXT: store i8 [[CONV1]], ptr [[B_ADDR_08]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_08]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_08]], i32 1
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_09]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
> @@ -407,10 +407,10 @@ define hidden void @pointer_phi_v16i8_add3(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_09:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]],
> [[FOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_08:%.*]] = phi ptr [ [[B:%.*]], [[ENTRY]] ], [
> [[INCDEC_PTR:%.*]], [[FOR_BODY]] ]
> ; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[A_ADDR_010]], align 1
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_010]], i32 3
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_010]], i32 3
> ; CHECK-NEXT: [[CONV1:%.*]] = add i8 [[TMP1]], [[TMP0]]
> ; CHECK-NEXT: store i8 [[CONV1]], ptr [[B_ADDR_08]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_08]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_08]], i32 1
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_09]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label [[FOR_BODY]]
> @@ -502,10 +502,10 @@ define hidden void @pointer_phi_v4f32_add2(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 996, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[A_ADDR_09]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_09]], i32 8
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_09]], i32 8
> ; CHECK-NEXT: [[ADD:%.*]] = fadd fast float [[TMP2]], [[Y]]
> ; CHECK-NEXT: store float [[ADD]], ptr [[B_ADDR_07]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_07]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_07]], i32 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
> @@ -556,10 +556,10 @@ define hidden void @pointer_phi_v4f32_add3(ptr
> noalias nocapture readonly %A, pt
> ; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 996, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[A_ADDR_09]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_09]], i32 12
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_09]], i32 12
> ; CHECK-NEXT: [[ADD:%.*]] = fadd fast float [[TMP3]], [[Y]]
> ; CHECK-NEXT: store float [[ADD]], ptr [[B_ADDR_07]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_07]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_07]], i32 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
> @@ -649,10 +649,10 @@ define hidden void @pointer_phi_v4half_add2(ptr
> noalias nocapture readonly %A, p
> ; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 992, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP2:%.*]] = load half, ptr [[A_ADDR_09]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_09]], i32 4
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_09]], i32 4
> ; CHECK-NEXT: [[ADD:%.*]] = fadd fast half [[TMP2]], [[Y]]
> ; CHECK-NEXT: store half [[ADD]], ptr [[B_ADDR_07]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_07]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_07]], i32 2
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
> @@ -703,10 +703,10 @@ define hidden void @pointer_phi_v4half_add3(ptr
> noalias nocapture readonly %A, p
> ; CHECK-NEXT: [[I_08:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 992, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP2:%.*]] = load half, ptr [[A_ADDR_09]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_09]], i32 6
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_09]], i32 6
> ; CHECK-NEXT: [[ADD:%.*]] = fadd fast half [[TMP2]], [[Y]]
> ; CHECK-NEXT: store half [[ADD]], ptr [[B_ADDR_07]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_07]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_07]], i32 2
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_08]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[END:%.*]], label
> [[FOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]]
> @@ -767,10 +767,10 @@ define hidden void @pointer_phi_v4i32_uf2(ptr
> noalias nocapture readonly %A, ptr
> ; CHECK-NEXT: [[I_07:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 9992, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_06:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[A_ADDR_08]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_08]], i32 24
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_08]], i32 24
> ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[Y]]
> ; CHECK-NEXT: store i32 [[ADD]], ptr [[B_ADDR_06]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_06]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_06]], i32 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_07]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 10000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]],
> label [[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
> @@ -842,10 +842,10 @@ define hidden void @pointer_phi_v4i32_uf4(ptr
> noalias nocapture readonly %A, ptr
> ; CHECK-NEXT: [[I_07:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 9984, [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[B_ADDR_06:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[FOR_BODY]] ], [ [[IND_END2]], [[VECTOR_BODY]] ]
> ; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[A_ADDR_08]], align 4
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[A_ADDR_08]], i32 24
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_08]], i32 24
> ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[Y]]
> ; CHECK-NEXT: store i32 [[ADD]], ptr [[B_ADDR_06]], align 4
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[B_ADDR_06]], i32 4
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[B_ADDR_06]], i32 4
> ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_07]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 10000
> ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]],
> label [[FOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
> @@ -907,20 +907,20 @@ define hidden void @mult_ptr_iv(ptr noalias
> nocapture readonly %x, ptr noalias n
> ; CHECK-NEXT: [[X_ADDR_050:%.*]] = phi ptr [ [[INCDEC_PTR2:%.*]],
> [[FOR_BODY]] ], [ [[X]], [[ENTRY]] ]
> ; CHECK-NEXT: [[Z_ADDR_049:%.*]] = phi ptr [ [[INCDEC_PTR34:%.*]],
> [[FOR_BODY]] ], [ [[Z]], [[ENTRY]] ]
> ; CHECK-NEXT: [[I_048:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 0, [[ENTRY]] ]
> -; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i8, ptr
> [[X_ADDR_050]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i8, ptr
> [[X_ADDR_050]], i32 1
> ; CHECK-NEXT: [[TMP10:%.*]] = load i8, ptr [[X_ADDR_050]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR1:%.*]] = getelementptr inbounds i8, ptr
> [[X_ADDR_050]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR1:%.*]] = getelementptr inbounds nuw i8, ptr
> [[X_ADDR_050]], i32 2
> ; CHECK-NEXT: [[TMP11:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR2]] = getelementptr inbounds i8, ptr
> [[X_ADDR_050]], i32 3
> +; CHECK-NEXT: [[INCDEC_PTR2]] = getelementptr inbounds nuw i8, ptr
> [[X_ADDR_050]], i32 3
> ; CHECK-NEXT: [[TMP12:%.*]] = load i8, ptr [[INCDEC_PTR1]], align 1
> ; CHECK-NEXT: [[MUL:%.*]] = mul i8 [[TMP10]], 10
> ; CHECK-NEXT: [[MUL1:%.*]] = mul i8 [[TMP10]], [[TMP11]]
> ; CHECK-NEXT: [[MUL2:%.*]] = mul i8 [[TMP10]], [[TMP12]]
> -; CHECK-NEXT: [[INCDEC_PTR32:%.*]] = getelementptr inbounds i8, ptr
> [[Z_ADDR_049]], i32 1
> +; CHECK-NEXT: [[INCDEC_PTR32:%.*]] = getelementptr inbounds nuw i8,
> ptr [[Z_ADDR_049]], i32 1
> ; CHECK-NEXT: store i8 [[MUL]], ptr [[Z_ADDR_049]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR33:%.*]] = getelementptr inbounds i8, ptr
> [[Z_ADDR_049]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR33:%.*]] = getelementptr inbounds nuw i8,
> ptr [[Z_ADDR_049]], i32 2
> ; CHECK-NEXT: store i8 [[MUL1]], ptr [[INCDEC_PTR32]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR34]] = getelementptr inbounds i8, ptr
> [[Z_ADDR_049]], i32 3
> +; CHECK-NEXT: [[INCDEC_PTR34]] = getelementptr inbounds nuw i8, ptr
> [[Z_ADDR_049]], i32 3
> ; CHECK-NEXT: store i8 [[MUL2]], ptr [[INCDEC_PTR33]], align 1
> ; CHECK-NEXT: [[INC]] = add nuw i32 [[I_048]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1000
>
> diff --git a/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
> b/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
> index 4ff5dc1bc91c69..b11a58c4c0ae6f 100644
> --- a/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
> +++ b/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
> @@ -101,10 +101,10 @@ define void @uaddsat(ptr nocapture readonly %pSrc,
> i16 signext %offset, ptr noca
> ; CHECK-NEXT: [[BLKCNT_09:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PSRC_ADDR_08:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL13]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR3:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL16]], [[VEC_EPILOG_SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_08]], i64 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_08]], i64 2
> ; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[PSRC_ADDR_08]], align 2
> ; CHECK-NEXT: [[TMP19:%.*]] = tail call i16 @llvm.uadd.sat.i16(i16
> [[TMP18]], i16 [[OFFSET]])
> -; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_07]], i64 2
> +; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_07]], i64 2
> ; CHECK-NEXT: store i16 [[TMP19]], ptr [[PDST_ADDR_07]], align 2
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
> @@ -220,10 +220,10 @@ define void @fshl(ptr nocapture readonly %pSrc, i8
> signext %offset, ptr nocaptur
> ; CHECK-NEXT: [[BLKCNT_09:%.*]] = phi i32 [ [[DEC:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PSRC_ADDR_08:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL12]], [[VEC_EPILOG_SCALAR_PH]] ]
> ; CHECK-NEXT: [[PDST_ADDR_07:%.*]] = phi ptr [ [[INCDEC_PTR3:%.*]],
> [[WHILE_BODY]] ], [ [[BC_RESUME_VAL15]], [[VEC_EPILOG_SCALAR_PH]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_08]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_08]], i64 1
> ; CHECK-NEXT: [[TMP14:%.*]] = load i8, ptr [[PSRC_ADDR_08]], align 2
> ; CHECK-NEXT: [[TMP15:%.*]] = tail call i8 @llvm.fshl.i8(i8 [[TMP14]],
> i8 [[TMP14]], i8 [[OFFSET]])
> -; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_07]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR3]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_07]], i64 1
> ; CHECK-NEXT: store i8 [[TMP15]], ptr [[PDST_ADDR_07]], align 2
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_09]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
>
> diff --git a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll
> b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll
> index 0a4b46b2c41fa0..d72acc088e602f 100644
> --- a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll
> +++ b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll
> @@ -363,11 +363,11 @@ define void @example23(ptr nocapture %src, ptr
> nocapture %dst) optsize {
> ; CHECK-NEXT: [[DOT04:%.*]] = phi ptr [ [[SRC:%.*]], [[TMP0:%.*]] ], [
> [[TMP2:%.*]], [[TMP1]] ]
> ; CHECK-NEXT: [[DOT013:%.*]] = phi ptr [ [[DST:%.*]], [[TMP0]] ], [
> [[TMP6:%.*]], [[TMP1]] ]
> ; CHECK-NEXT: [[I_02:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7:%.*]],
> [[TMP1]] ]
> -; CHECK-NEXT: [[TMP2]] = getelementptr inbounds i8, ptr [[DOT04]], i64
> 2
> +; CHECK-NEXT: [[TMP2]] = getelementptr inbounds nuw i8, ptr [[DOT04]],
> i64 2
> ; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[DOT04]], align 2
> ; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP3]] to i32
> ; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i32 [[TMP4]], 7
> -; CHECK-NEXT: [[TMP6]] = getelementptr inbounds i8, ptr [[DOT013]],
> i64 4
> +; CHECK-NEXT: [[TMP6]] = getelementptr inbounds nuw i8, ptr
> [[DOT013]], i64 4
> ; CHECK-NEXT: store i32 [[TMP5]], ptr [[DOT013]], align 4
> ; CHECK-NEXT: [[TMP7]] = add nuw nsw i32 [[I_02]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[TMP7]], 256
> @@ -549,11 +549,11 @@ define i64 @example23d(ptr noalias nocapture %src,
> ptr noalias nocapture %dst) o
> ; CHECK-NEXT: [[DOT04:%.*]] = phi ptr [ [[SRC:%.*]], [[TMP0:%.*]] ], [
> [[TMP2:%.*]], [[TMP1]] ]
> ; CHECK-NEXT: [[DOT013:%.*]] = phi ptr [ [[DST:%.*]], [[TMP0]] ], [
> [[TMP6:%.*]], [[TMP1]] ]
> ; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[TMP0]] ], [ [[TMP7:%.*]],
> [[TMP1]] ]
> -; CHECK-NEXT: [[TMP2]] = getelementptr inbounds i8, ptr [[DOT04]], i64
> 2
> +; CHECK-NEXT: [[TMP2]] = getelementptr inbounds nuw i8, ptr [[DOT04]],
> i64 2
> ; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[DOT04]], align 2
> ; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP3]] to i32
> ; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i32 [[TMP4]], 7
> -; CHECK-NEXT: [[TMP6]] = getelementptr inbounds i8, ptr [[DOT013]],
> i64 4
> +; CHECK-NEXT: [[TMP6]] = getelementptr inbounds nuw i8, ptr
> [[DOT013]], i64 4
> ; CHECK-NEXT: store i32 [[TMP5]], ptr [[DOT013]], align 4
> ; CHECK-NEXT: [[TMP7]] = add nuw nsw i64 [[I_02]], 1
> ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP7]], 257
>
> diff --git
> a/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
> b/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
> index 249608f413fb2f..8c2cc8e799bcda 100644
> --- a/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
> +++ b/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
> @@ -305,15 +305,15 @@ define void @multiply_alias_2x2(ptr %A, ptr %B, ptr
> %C) {
> ; CHECK-NEXT: [[RESULT_VEC_1:%.*]] = phi <2 x float> [
> zeroinitializer, [[ROWS_BODY]] ], [ [[TMP17:%.*]], [[INNER_LATCH]] ]
> ; CHECK-NEXT: br label [[INNER_BODY:%.*]]
> ; CHECK: inner.body:
> -; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[INNER_IV]], 1
> -; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], [[ROWS_IV]]
> -; CHECK-NEXT: [[TMP10:%.*]] = getelementptr float, ptr [[TMP3]], i64
> [[TMP9]]
> +; CHECK-NEXT: [[DOTIDX1:%.*]] = shl i64 [[INNER_IV]], 3
> +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP3]], i64
> [[DOTIDX1]]
> +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr float, ptr [[TMP8]], i64
> [[ROWS_IV]]
> ; CHECK-NEXT: [[COL_LOAD:%.*]] = load <2 x float>, ptr [[TMP10]],
> align 4
> ; CHECK-NEXT: [[VEC_GEP:%.*]] = getelementptr i8, ptr [[TMP10]], i64 8
> ; CHECK-NEXT: [[COL_LOAD8:%.*]] = load <2 x float>, ptr [[VEC_GEP]],
> align 4
> -; CHECK-NEXT: [[TMP11:%.*]] = shl i64 [[COLS_IV]], 1
> -; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP11]], [[INNER_IV]]
> -; CHECK-NEXT: [[TMP13:%.*]] = getelementptr float, ptr [[TMP7]], i64
> [[TMP12]]
> +; CHECK-NEXT: [[DOTIDX24:%.*]] = shl i64 [[COLS_IV]], 3
> +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP7]], i64
> [[DOTIDX24]]
> +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr float, ptr [[TMP11]], i64
> [[INNER_IV]]
> ; CHECK-NEXT: [[COL_LOAD9:%.*]] = load <2 x float>, ptr [[TMP13]],
> align 4
> ; CHECK-NEXT: [[VEC_GEP10:%.*]] = getelementptr i8, ptr [[TMP13]], i64
> 8
> ; CHECK-NEXT: [[COL_LOAD11:%.*]] = load <2 x float>, ptr
> [[VEC_GEP10]], align 4
>
> diff --git
> a/llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
> b/llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
> index e4e2115a580c42..600e30f6853e69 100644
> ---
> a/llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
> +++
> b/llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
> @@ -30,7 +30,7 @@ define void @test_find_min(ptr noundef nonnull align 8
> dereferenceable(24) %this
> ; CHECK-NEXT: [[CMP3:%.*]] = icmp eq ptr [[MIN_010]], null
> ; CHECK-NEXT: br i1 [[CMP3]], label [[COND_END7]], label
> [[COND_FALSE:%.*]]
> ; CHECK: cond.false:
> -; CHECK-NEXT: [[KEY2:%.*]] = getelementptr inbounds i8, ptr
> [[MIN_010]], i64 4
> +; CHECK-NEXT: [[KEY2:%.*]] = getelementptr inbounds nuw i8, ptr
> [[MIN_010]], i64 4
> ; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[KEY2]], align 4
> ; CHECK-NEXT: [[KEY:%.*]] = getelementptr inbounds nuw i8, ptr
> [[TMP3]], i64 4
> ; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[KEY]], align 4
>
> diff --git a/llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
> b/llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
> index 64e1076da44ddd..aab787b2b2d2c3 100644
> --- a/llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
> +++ b/llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
> @@ -23,7 +23,7 @@ define void @arm_mean_q7(ptr noundef %pSrc, i32 noundef
> %blockSize, ptr noundef
> ; CHECK-NEXT: [[TMP2:%.*]] = tail call i32
> @llvm.arm.mve.addv.v16i8(<16 x i8> [[TMP1]], i32 0)
> ; CHECK-NEXT: [[TMP3]] = add i32 [[TMP2]], [[SUM_013]]
> ; CHECK-NEXT: [[DEC]] = add nsw i32 [[BLKCNT_011]], -1
> -; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr
> [[PSRC_ADDR_012]], i32 16
> +; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRC_ADDR_012]], i32 16
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
> ; CHECK-NEXT: br i1 [[CMP_NOT]], label [[WHILE_END_LOOPEXIT:%.*]],
> label [[WHILE_BODY]]
> ; CHECK: while.end.loopexit:
>
> diff --git a/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
> b/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
> index 595b0f76a418be..ef651010d6a905 100644
> --- a/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
> +++ b/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
> @@ -60,17 +60,17 @@ define void @arm_mult_q15(ptr %pSrcA, ptr %pSrcB, ptr
> noalias %pDst, i32 %blockS
> ; CHECK-NEXT: [[PSRCA_ADDR_05:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]],
> [[WHILE_BODY]] ], [ [[PSRCA_ADDR_05_PH]], [[WHILE_BODY_PREHEADER18]] ]
> ; CHECK-NEXT: [[PDST_ADDR_04:%.*]] = phi ptr [ [[INCDEC_PTR4:%.*]],
> [[WHILE_BODY]] ], [ [[PDST_ADDR_04_PH]], [[WHILE_BODY_PREHEADER18]] ]
> ; CHECK-NEXT: [[PSRCB_ADDR_03:%.*]] = phi ptr [ [[INCDEC_PTR1:%.*]],
> [[WHILE_BODY]] ], [ [[PSRCB_ADDR_03_PH]], [[WHILE_BODY_PREHEADER18]] ]
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[PSRCA_ADDR_05]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[PSRCA_ADDR_05]], i32 2
> ; CHECK-NEXT: [[TMP10:%.*]] = load i16, ptr [[PSRCA_ADDR_05]], align 2
> ; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP10]] to i32
> -; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i8, ptr
> [[PSRCB_ADDR_03]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds nuw i8, ptr
> [[PSRCB_ADDR_03]], i32 2
> ; CHECK-NEXT: [[TMP11:%.*]] = load i16, ptr [[PSRCB_ADDR_03]], align 2
> ; CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[TMP11]] to i32
> ; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV2]], [[CONV]]
> ; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[MUL]], 15
> ; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = tail call i32 @llvm.smin.i32(i32
> [[SHR]], i32 32767)
> ; CHECK-NEXT: [[CONV3:%.*]] = trunc nsw i32 [[SPEC_SELECT_I]] to i16
> -; CHECK-NEXT: [[INCDEC_PTR4]] = getelementptr inbounds i8, ptr
> [[PDST_ADDR_04]], i32 2
> +; CHECK-NEXT: [[INCDEC_PTR4]] = getelementptr inbounds nuw i8, ptr
> [[PDST_ADDR_04]], i32 2
> ; CHECK-NEXT: store i16 [[CONV3]], ptr [[PDST_ADDR_04]], align 2
> ; CHECK-NEXT: [[DEC]] = add i32 [[BLKCNT_06]], -1
> ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[DEC]], 0
>
> diff --git a/llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
> b/llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
> index 966d7e3cded0ab..43f6cf7e51d09a 100644
> --- a/llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
> +++ b/llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
> @@ -23,8 +23,8 @@ define void @apply_delta(ptr nocapture noundef %dst, ptr
> nocapture noundef reado
> ; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i8>, ptr [[ADD_PTR]], align 1
> ; CHECK-NEXT: [[ADD:%.*]] = add <8 x i8> [[TMP1]], [[TMP0]]
> ; CHECK-NEXT: store <8 x i8> [[ADD]], ptr [[DST_ADDR_024]], align 1
> -; CHECK-NEXT: [[ADD_PTR1]] = getelementptr inbounds i8, ptr
> [[DST_ADDR_024]], i64 8
> -; CHECK-NEXT: [[ADD_PTR2]] = getelementptr inbounds i8, ptr
> [[SRC_ADDR_023]], i64 8
> +; CHECK-NEXT: [[ADD_PTR1]] = getelementptr inbounds nuw i8, ptr
> [[DST_ADDR_024]], i64 8
> +; CHECK-NEXT: [[ADD_PTR2]] = getelementptr inbounds nuw i8, ptr
> [[SRC_ADDR_023]], i64 8
> ; CHECK-NEXT: [[SUB]] = add i64 [[COUNT_ADDR_022]], -8
> ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[SUB]], 7
> ; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label
> [[WHILE_COND3_PREHEADER]]
> @@ -38,8 +38,8 @@ define void @apply_delta(ptr nocapture noundef %dst, ptr
> nocapture noundef reado
> ; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
> ; CHECK-NEXT: [[ADD6:%.*]] = add i8 [[TMP3]], [[TMP2]]
> ; CHECK-NEXT: store i8 [[ADD6]], ptr [[DST_ADDR_130]], align 1
> -; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr
> [[DST_ADDR_130]], i64 1
> -; CHECK-NEXT: [[INCDEC_PTR8]] = getelementptr inbounds i8, ptr
> [[SRC_ADDR_129]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds nuw i8, ptr
> [[DST_ADDR_130]], i64 1
> +; CHECK-NEXT: [[INCDEC_PTR8]] = getelementptr inbounds nuw i8, ptr
> [[SRC_ADDR_129]], i64 1
> ; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i64 [[DEC]], 0
> ; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[WHILE_END9]], label
> [[WHILE_BODY4]]
> ; CHECK: while.end9:
>
> diff --git
> a/llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
> b/llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
> index cd95e9fba94387..2fe420183c6839 100644
> ---
> a/llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
> +++
> b/llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
> @@ -23,7 +23,7 @@ define dso_local void @test(ptr %start, ptr %end) #0 {
> ; AVX-NEXT: store i32 42, ptr [[PTR2]], align 4
> ; AVX-NEXT: br label [[LATCH]]
> ; AVX: latch:
> -; AVX-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR2]],
> i64 4
> +; AVX-NEXT: [[PTR_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[PTR2]], i64 4
> ; AVX-NEXT: [[I11_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[END]]
> ; AVX-NEXT: br i1 [[I11_NOT]], label [[EXIT]], label [[BB12]]
> ; AVX: exit:
> @@ -122,7 +122,7 @@ define dso_local void @test(ptr %start, ptr %end) #0 {
> ; AVX2-NEXT: store i32 42, ptr [[PTR2]], align 4
> ; AVX2-NEXT: br label [[LATCH]]
> ; AVX2: latch:
> -; AVX2-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, ptr [[PTR2]],
> i64 4
> +; AVX2-NEXT: [[PTR_NEXT]] = getelementptr inbounds nuw i8, ptr
> [[PTR2]], i64 4
> ; AVX2-NEXT: [[I11_NOT:%.*]] = icmp eq ptr [[PTR_NEXT]], [[END]]
> ; AVX2-NEXT: br i1 [[I11_NOT]], label [[EXIT]], label [[BB13]],
> !llvm.loop [[LOOP4:![0-9]+]]
> ; AVX2: exit:
>
> diff --git
> a/llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
> b/llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
> index 98b11578b49fbf..5f75bd788e4bb4 100644
> ---
> a/llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
> +++
> b/llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
> @@ -19,7 +19,7 @@ define void @test(i8* noalias nonnull align 1 %start,
> i8* %end) unnamed_addr {
> ; NOROTATION-NEXT: [[_12_I:%.*]] = icmp eq ptr [[PTR_IV]], [[END]]
> ; NOROTATION-NEXT: br i1 [[_12_I]], label [[EXIT:%.*]], label
> [[LOOP_LATCH]]
> ; NOROTATION: loop.latch:
> -; NOROTATION-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i8, ptr
> [[PTR_IV]], i64 1
> +; NOROTATION-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds nuw i8,
> ptr [[PTR_IV]], i64 1
> ; NOROTATION-NEXT: store i8 1, ptr [[PTR_IV]], align 1
> ; NOROTATION-NEXT: br label [[LOOP_HEADER]]
> ; NOROTATION: exit:
>
> diff --git a/llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
> b/llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
> index 26920b053e7e72..394204e9409a14 100644
> --- a/llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
> +++ b/llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
> @@ -38,7 +38,7 @@ define void @test_fill_with_foreach([2 x i64]
> %elems.coerce) {
> ; CHECK: for.body:
> ; CHECK-NEXT: [[__BEGIN1_SROA_0_03:%.*]] = phi ptr [
> [[INCDEC_PTR_I:%.*]], [[FOR_BODY]] ], [ [[TMP0]],
> [[FOR_COND_PREHEADER_SPLIT]] ]
> ; CHECK-NEXT: tail call void @use(ptr noundef nonnull align 4
> dereferenceable(4) [[__BEGIN1_SROA_0_03]])
> -; CHECK-NEXT: [[INCDEC_PTR_I]] = getelementptr inbounds i8, ptr
> [[__BEGIN1_SROA_0_03]], i64 4
> +; CHECK-NEXT: [[INCDEC_PTR_I]] = getelementptr inbounds nuw i8, ptr
> [[__BEGIN1_SROA_0_03]], i64 4
> ; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq ptr [[INCDEC_PTR_I]],
> [[ADD_PTR_I]]
> ; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[COMMON_RET]], label
> [[FOR_BODY]]
> ;
>
> diff --git a/llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
> b/llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
> index af123ad2367faf..4a19940b6f874f 100644
> --- a/llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
> +++ b/llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
> @@ -19,8 +19,8 @@ define void @test1(i32 %d, ptr %p) nounwind uwtable ssp {
> ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%for.body> U: [0,64) S: [0,64)
> Exits: 63 LoopDispositions: { %for.body: Computable }
> ; CHECK-NEXT: %p.addr.02 = phi ptr [ %p, %entry ], [ %add.ptr1,
> %for.body ]
> ; CHECK-NEXT: --> {%p,+,(8 * (%d /u 4))}<%for.body> U: full-set S:
> full-set Exits: ((504 * (%d /u 4)) + %p) LoopDispositions: { %for.body:
> Computable }
> -; CHECK-NEXT: %add.ptr = getelementptr inbounds i32, ptr %p.addr.02,
> i32 %div1
> -; CHECK-NEXT: --> {((4 * (%d /u 4))<nuw><nsw> + %p),+,(8 * (%d /u
> 4))}<%for.body> U: full-set S: full-set Exits: ((508 * (%d /u 4)) + %p)
> LoopDispositions: { %for.body: Computable }
> +; CHECK-NEXT: %add.ptr = getelementptr inbounds nuw i32, ptr
> %p.addr.02, i32 %div1
> +; CHECK-NEXT: --> {((4 * (%d /u 4))<nuw><nsw> + %p)<nuw>,+,(8 * (%d /u
> 4))}<%for.body> U: full-set S: full-set Exits: ((508 * (%d /u 4)) + %p)
> LoopDispositions: { %for.body: Computable }
> ; CHECK-NEXT: %add.ptr1 = getelementptr inbounds nuw i32, ptr
> %add.ptr, i32 %div1
> ; CHECK-NEXT: --> {((8 * (%d /u 4)) + %p),+,(8 * (%d /u
> 4))}<%for.body> U: full-set S: full-set Exits: ((512 * (%d /u 4)) + %p)
> LoopDispositions: { %for.body: Computable }
> ; CHECK-NEXT: %inc = add nuw nsw i32 %i.03, 1
> @@ -66,8 +66,8 @@ define void @test1a(i32 %d, ptr %p) nounwind uwtable ssp
> {
> ; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%for.body> U: [0,64) S: [0,64)
> Exits: 63 LoopDispositions: { %for.body: Computable }
> ; CHECK-NEXT: %p.addr.02 = phi ptr [ %p, %entry ], [ %add.ptr1,
> %for.body ]
> ; CHECK-NEXT: --> {%p,+,(8 * (%d /u 2))}<%for.body> U: full-set S:
> full-set Exits: ((504 * (%d /u 2)) + %p) LoopDispositions: { %for.body:
> Computable }
> -; CHECK-NEXT: %add.ptr = getelementptr inbounds i32, ptr %p.addr.02,
> i32 %div1
> -; CHECK-NEXT: --> {((4 * (%d /u 2))<nuw><nsw> + %p),+,(8 * (%d /u
> 2))}<%for.body> U: full-set S: full-set Exits: ((508 * (%d /u 2)) + %p)
> LoopDispositions: { %for.body: Computable }
> +; CHECK-NEXT: %add.ptr = getelementptr inbounds nuw i32, ptr
> %p.addr.02, i32 %div1
> +; CHECK-NEXT: --> {((4 * (%d /u 2))<nuw><nsw> + %p)<nuw>,+,(8 * (%d /u
> 2))}<%for.body> U: full-set S: full-set Exits: ((508 * (%d /u 2)) + %p)
> LoopDispositions: { %for.body: Computable }
> ; CHECK-NEXT: %add.ptr1 = getelementptr inbounds nuw i32, ptr
> %add.ptr, i32 %div1
> ; CHECK-NEXT: --> {((8 * (%d /u 2)) + %p),+,(8 * (%d /u
> 2))}<%for.body> U: full-set S: full-set Exits: ((512 * (%d /u 2)) + %p)
> LoopDispositions: { %for.body: Computable }
> ; CHECK-NEXT: %inc = add nuw nsw i32 %i.03, 1
> @@ -199,7 +199,7 @@ define void @test_range_ref1(i8 %t) {
> ; CHECK-NEXT: --> %t.ptr U: [0,256) S: [0,256)
> ; CHECK-NEXT: %idx = phi ptr [ %t.ptr, %entry ], [ %snext, %loop ]
> ; CHECK-NEXT: --> {%t.ptr,+,1}<nuw><%loop> U: full-set S: full-set
> Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
> -; CHECK-NEXT: %snext = getelementptr inbounds i8, ptr %idx, i32 1
> +; CHECK-NEXT: %snext = getelementptr inbounds nuw i8, ptr %idx, i32 1
> ; CHECK-NEXT: --> {(1 + %t.ptr)<nuw><nsw>,+,1}<nw><%loop> U: full-set
> S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
> ; CHECK-NEXT: Determining loop execution counts for: @test_range_ref1
> ; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
>
> diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
> b/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
> index 51c6673a143537..900d5f293b5b8b 100644
> --- a/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
> +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
> @@ -36,7 +36,7 @@ define i32 @gather_reduce_8x16_i32(ptr nocapture
> readonly %a, ptr nocapture read
> ; GENERIC-NEXT: [[I_0103:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]]
> ], [ 0, [[FOR_BODY_PREHEADER]] ]
> ; GENERIC-NEXT: [[SUM_0102:%.*]] = phi i32 [ [[ADD66]], [[FOR_BODY]]
> ], [ 0, [[FOR_BODY_PREHEADER]] ]
> ; GENERIC-NEXT: [[A_ADDR_0101:%.*]] = phi ptr [ [[INCDEC_PTR58:%.*]],
> [[FOR_BODY]] ], [ [[A:%.*]], [[FOR_BODY_PREHEADER]] ]
> -; GENERIC-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i8, ptr
> [[A_ADDR_0101]], i64 16
> +; GENERIC-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_0101]], i64 16
> ; GENERIC-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR_0101]],
> align 2
> ; GENERIC-NEXT: [[TMP1:%.*]] = zext <8 x i16> [[TMP0]] to <8 x i32>
> ; GENERIC-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[B:%.*]], align 2
> @@ -109,7 +109,7 @@ define i32 @gather_reduce_8x16_i32(ptr nocapture
> readonly %a, ptr nocapture read
> ; KRYO-NEXT: [[I_0103:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 0, [[FOR_BODY_PREHEADER]] ]
> ; KRYO-NEXT: [[SUM_0102:%.*]] = phi i32 [ [[ADD66]], [[FOR_BODY]] ], [
> 0, [[FOR_BODY_PREHEADER]] ]
> ; KRYO-NEXT: [[A_ADDR_0101:%.*]] = phi ptr [ [[INCDEC_PTR58:%.*]],
> [[FOR_BODY]] ], [ [[A:%.*]], [[FOR_BODY_PREHEADER]] ]
> -; KRYO-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i8, ptr
> [[A_ADDR_0101]], i64 16
> +; KRYO-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_0101]], i64 16
> ; KRYO-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR_0101]], align
> 2
> ; KRYO-NEXT: [[TMP1:%.*]] = zext <8 x i16> [[TMP0]] to <8 x i32>
> ; KRYO-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[B:%.*]], align 2
> @@ -293,7 +293,7 @@ define i32 @gather_reduce_8x16_i64(ptr nocapture
> readonly %a, ptr nocapture read
> ; GENERIC-NEXT: [[I_0103:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]]
> ], [ 0, [[FOR_BODY_PREHEADER]] ]
> ; GENERIC-NEXT: [[SUM_0102:%.*]] = phi i32 [ [[ADD66]], [[FOR_BODY]]
> ], [ 0, [[FOR_BODY_PREHEADER]] ]
> ; GENERIC-NEXT: [[A_ADDR_0101:%.*]] = phi ptr [ [[INCDEC_PTR58:%.*]],
> [[FOR_BODY]] ], [ [[A:%.*]], [[FOR_BODY_PREHEADER]] ]
> -; GENERIC-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i8, ptr
> [[A_ADDR_0101]], i64 16
> +; GENERIC-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_0101]], i64 16
> ; GENERIC-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR_0101]],
> align 2
> ; GENERIC-NEXT: [[TMP1:%.*]] = zext <8 x i16> [[TMP0]] to <8 x i32>
> ; GENERIC-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[B:%.*]], align 2
> @@ -366,7 +366,7 @@ define i32 @gather_reduce_8x16_i64(ptr nocapture
> readonly %a, ptr nocapture read
> ; KRYO-NEXT: [[I_0103:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [
> 0, [[FOR_BODY_PREHEADER]] ]
> ; KRYO-NEXT: [[SUM_0102:%.*]] = phi i32 [ [[ADD66]], [[FOR_BODY]] ], [
> 0, [[FOR_BODY_PREHEADER]] ]
> ; KRYO-NEXT: [[A_ADDR_0101:%.*]] = phi ptr [ [[INCDEC_PTR58:%.*]],
> [[FOR_BODY]] ], [ [[A:%.*]], [[FOR_BODY_PREHEADER]] ]
> -; KRYO-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds i8, ptr
> [[A_ADDR_0101]], i64 16
> +; KRYO-NEXT: [[INCDEC_PTR58]] = getelementptr inbounds nuw i8, ptr
> [[A_ADDR_0101]], i64 16
> ; KRYO-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR_0101]], align
> 2
> ; KRYO-NEXT: [[TMP1:%.*]] = zext <8 x i16> [[TMP0]] to <8 x i32>
> ; KRYO-NEXT: [[TMP2:%.*]] = load <8 x i16>, ptr [[B:%.*]], align 2
>
>
>
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