[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 6 12:19:12 PST 2024
tschuett wrote:
> Adding patterns with the only purpose of having something for global-isel to scrape does not seem sensible to me.
That ship has sailed long ago:
llvm/lib/Target/AArch64/AArch64InstrGISel.td
```
// Pattern is used for GlobalISel
multiclass SIMDAcrossLaneLongPairIntrinsicGISel<string Opc, SDPatternOperator addlp> {
// Patterns for addv(addlp(x)) ==> addlv
def : Pat<(i16 (vecreduce_add (v4i16 (addlp (v8i8 V64:$Rn))))),
(!cast<Instruction>(Opc#"v8i8v") V64:$Rn)>;
def : Pat<(i16 (vecreduce_add (v8i16 (addlp (v16i8 V128:$Rn))))),
(!cast<Instruction>(Opc#"v16i8v") V128:$Rn)>;
def : Pat<(i32 (vecreduce_add (v4i32 (addlp (v8i16 V128:$Rn))))),
(!cast<Instruction>(Opc#"v8i16v") V128:$Rn)>;
// Patterns for addp(addlp(x))) ==> addlv
def : Pat<(i32 (vecreduce_add (v2i32 (addlp (v4i16 V64:$Rn))))),
(!cast<Instruction>(Opc#"v4i16v") V64:$Rn)>;
def : Pat<(i64 (vecreduce_add (v2i64 (addlp (v4i32 V128:$Rn))))),
(!cast<Instruction>(Opc#"v4i32v") V128:$Rn)>;
}
defm : SIMDAcrossLaneLongPairIntrinsicGISel<"UADDLV", AArch64uaddlp>;
defm : SIMDAcrossLaneLongPairIntrinsicGISel<"SADDLV", AArch64saddlp>;
```
```
// The following SetCC patterns are used for GlobalISel only
```
It is the opposite. We should finally start adding SVE patterns with GlobalISel has primary user.
https://github.com/llvm/llvm-project/pull/114784
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