[llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #118865)

[Matt Arsenault via llvm-commits]

Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/118865 at github.com>


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@@ -7865,3 +7865,35 @@ bool CombinerHelper::matchSuboCarryOut(const MachineInstr &MI,
 
   return false;
 }
+
+// sub(smax(lhs,rhs), smin(lhs,rhs)) -> abds(lhs, rhs)
+bool CombinerHelper::matchSubAbds(const MachineInstr &MI) {
+  const GSub *Sub = cast<GSub>(&MI);
+  const GMaxMinOp *LHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
+  const GMaxMinOp *RHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
+
+  if (!MRI.hasOneNonDBGUse(LHS->getReg(0)) ||
+      !MRI.hasOneNonDBGUse(RHS->getReg(0)))
+    return false;
+
+  Register Dst = Sub->getReg(0);
+  LLT DstTy = MRI.getType(Dst);
+
+  return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDS, {DstTy}});
+}
+
+// sub(umax(lhs,rhs), umin(lhs,rhs)) -> abdu(lhs, rhs)
+bool CombinerHelper::matchSubAbdu(const MachineInstr &MI) {
+  const GSub *Sub = cast<GSub>(&MI);
+  const GMaxMinOp *LHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
+  const GMaxMinOp *RHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
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arsenm wrote:

getLHSReg->getRHSReg?

https://github.com/llvm/llvm-project/pull/118865