[llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)

[Matt Arsenault via llvm-commits]

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@@ -139,6 +139,10 @@ bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {
       return RBI.constrainGenericRegister(DstReg, *RC, *MRI);
     }
 
+    // Allow copy from physical register other than SCC to s1.
+    if (SrcReg.isPhysical() && SrcReg != AMDGPU::SCC)
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arsenm wrote:

SrcReg != AMDGPU::SCC is redundant with the above scc check.This also early exists without constraining the result register.

You also cannot interpret a register without a type. You must take the type from the virtual register in the other position. This is exactly the same as in the regbankselect patch

https://github.com/llvm/llvm-project/pull/96157