[llvm] [Xtensa] Implement vararg support. (PR #117126)

[Sergei Barannikov via llvm-commits]

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@@ -0,0 +1,87 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s --mtriple=xtensa | FileCheck %s
+
+define void @test(...) {
+; CHECK-LABEL: test:
+; CHECK:         .cfi_startproc
+; CHECK-NEXT:  # %bb.0: # %entry
+; CHECK-NEXT:    addi a8, a1, -32
+; CHECK-NEXT:    or a1, a8, a8
+; CHECK-NEXT:    .cfi_def_cfa_offset 32
+; CHECK-NEXT:    s32i a7, a1, 20
+; CHECK-NEXT:    s32i a6, a1, 16
+; CHECK-NEXT:    s32i a5, a1, 12
+; CHECK-NEXT:    s32i a4, a1, 8
+; CHECK-NEXT:    s32i a3, a1, 4
+; CHECK-NEXT:    s32i a2, a1, 0
+; CHECK-NEXT:    addi a8, a1, 32
+; CHECK-NEXT:    or a1, a8, a8
+; CHECK-NEXT:    ret
+entry:
+  ret void
+}
+
+
+declare void @llvm.va_start(ptr) nounwind
+declare void @llvm.va_end(ptr) nounwind
+declare void @f(i32) nounwind
+define void @test_vararg(...) nounwind {
+; CHECK-LABEL: test_vararg:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addi a8, a1, -48
+; CHECK-NEXT:    or a1, a8, a8
+; CHECK-NEXT:    s32i a0, a1, 12 # 4-byte Folded Spill
+; CHECK-NEXT:    s32i a12, a1, 8 # 4-byte Folded Spill
+; CHECK-NEXT:    s32i a13, a1, 4 # 4-byte Folded Spill
+; CHECK-NEXT:    s32i a7, a1, 36
+; CHECK-NEXT:    s32i a6, a1, 32
+; CHECK-NEXT:    s32i a5, a1, 28
+; CHECK-NEXT:    s32i a4, a1, 24
+; CHECK-NEXT:    s32i a3, a1, 20
+; CHECK-NEXT:    s32i a2, a1, 16
+; CHECK-NEXT:    movi a8, 0
+; CHECK-NEXT:    s32i a8, a1, 8
+; CHECK-NEXT:    addi a8, a1, 16
+; CHECK-NEXT:    s32i a8, a1, 4
+; CHECK-NEXT:    addi a8, a1, 48
+; CHECK-NEXT:    addi a8, a8, -32
+; CHECK-NEXT:    s32i a8, a1, 0
+; CHECK-NEXT:    movi a12, 24
+; CHECK-NEXT:    l32r a13, .LCPI1_0
+; CHECK-NEXT:    j .LBB1_2
+; CHECK-NEXT:  .LBB1_1: # %for.cond
+; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT:    s32i a8, a1, 8
+; CHECK-NEXT:    add a8, a8, a9
+; CHECK-NEXT:    addi a8, a8, -3
+; CHECK-NEXT:    l32i a2, a8, 0
+; CHECK-NEXT:    callx0 a13
+; CHECK-NEXT:  .LBB1_2: # %for.cond
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    l32i a10, a1, 8
+; CHECK-NEXT:    addi a8, a10, 3
+; CHECK-NEXT:    blt a12, a8, .LBB1_4
+; CHECK-NEXT:  # %bb.3: # %for.cond
+; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT:    l32i a9, a1, 4
+; CHECK-NEXT:    bge a12, a8, .LBB1_1
+; CHECK-NEXT:    j .LBB1_5
+; CHECK-NEXT:  .LBB1_4: # in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT:    l32i a9, a1, 0
+; CHECK-NEXT:    bge a12, a8, .LBB1_1
+; CHECK-NEXT:  .LBB1_5: # in Loop: Header=BB1_2 Depth=1
+; CHECK-NEXT:    addi a8, a10, 38
+; CHECK-NEXT:    j .LBB1_1
+entry:
+  %list = alloca ptr, align 4
+  call void @llvm.va_start(ptr %list)
+  br label %for.cond
+
+for.cond:
+  %0 = va_arg ptr %list, i32
+  call void @f(i32 %0)
+  br label %for.cond
+
+  call void @llvm.va_end(ptr %list)
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s-barannikov wrote:

It is unreachable.

https://github.com/llvm/llvm-project/pull/117126