[llvm] 1885886 - [X86] matchIndexRecursively - fix incorrect signed/unsigned constant creation

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 6 05:37:03 PST 2024


Author: Simon Pilgrim
Date: 2024-12-06T13:36:43Z
New Revision: 1885886b3f42922ed76812c3b1a1b81f3532bbc9

URL: https://github.com/llvm/llvm-project/commit/1885886b3f42922ed76812c3b1a1b81f3532bbc9
DIFF: https://github.com/llvm/llvm-project/commit/1885886b3f42922ed76812c3b1a1b81f3532bbc9.diff

LOG: [X86] matchIndexRecursively - fix incorrect signed/unsigned constant creation

Fixes #118934

Added: 
    llvm/test/CodeGen/X86/pr118934.ll

Modified: 
    llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 93d196d0fde5cf..76ef207f7d47d5 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2423,11 +2423,11 @@ SDValue X86DAGToDAGISel::matchIndexRecursively(SDValue N,
       if (CurDAG->isBaseWithConstantOffset(Src)) {
         SDValue AddSrc = Src.getOperand(0);
         auto *AddVal = cast<ConstantSDNode>(Src.getOperand(1));
-        uint64_t Offset = (uint64_t)AddVal->getSExtValue();
-        if (!foldOffsetIntoAddress(Offset * AM.Scale, AM)) {
+        int64_t Offset = AddVal->getSExtValue();
+        if (!foldOffsetIntoAddress((uint64_t)Offset * AM.Scale, AM)) {
           SDLoc DL(N);
           SDValue ExtSrc = CurDAG->getNode(Opc, DL, VT, AddSrc);
-          SDValue ExtVal = CurDAG->getConstant(Offset, DL, VT);
+          SDValue ExtVal = CurDAG->getSignedConstant(Offset, DL, VT);
           SDValue ExtAdd = CurDAG->getNode(ISD::ADD, DL, VT, ExtSrc, ExtVal);
           insertDAGNode(*CurDAG, N, ExtSrc);
           insertDAGNode(*CurDAG, N, ExtVal);

diff  --git a/llvm/test/CodeGen/X86/pr118934.ll b/llvm/test/CodeGen/X86/pr118934.ll
new file mode 100644
index 00000000000000..b68ed2643d8dfa
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr118934.ll
@@ -0,0 +1,45 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+
+define void @PR118934(i1 %b, ptr %f, ptr %k) {
+; X86-LABEL: PR118934:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    andb $1, %dl
+; X86-NEXT:    addb %dl, %dl
+; X86-NEXT:    addb $-2, %dl
+; X86-NEXT:    movsbl %dl, %edx
+; X86-NEXT:    addl $-6, %edx
+; X86-NEXT:    addl $6, %edx
+; X86-NEXT:    movl %edx, (%ecx)
+; X86-NEXT:    addl %edx, %edx
+; X86-NEXT:    movl %edx, (%eax)
+;
+; X64-LABEL: PR118934:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    andb $1, %dil
+; X64-NEXT:    addb %dil, %dil
+; X64-NEXT:    addb $-2, %dil
+; X64-NEXT:    movsbl %dil, %eax
+; X64-NEXT:    addl $-6, %eax
+; X64-NEXT:    addl $6, %eax
+; X64-NEXT:    movl %eax, (%rsi)
+; X64-NEXT:    addl %eax, %eax
+; X64-NEXT:    movl %eax, (%rdx)
+entry:
+  %0 = select i1 %b, i8 0, i8 -2
+  br label %for.end
+
+for.end:
+  %n.i.i = select i1 poison, i32 6, i32 7
+  %narrow = add nsw i8 %0, -6
+  %add2.i = sext i8 %narrow to i32
+  %conv5.i = add nsw i32 %n.i.i, %add2.i
+  store i32 %conv5.i, ptr %f, align 4
+  %add = shl nsw i32 %conv5.i, 1
+  store i32 %add, ptr %k, align 4
+  unreachable
+}


        


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