[compiler-rt] [tsan] Fix deadlock with dyld during symbolization on darwin platforms (PR #113661)

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https://github.com/pudge62 converted_to_draft https://github.com/llvm/llvm-project/pull/113661

Previous message: [compiler-rt] [tsan] Fix deadlock with dyld during symbolization on darwin platforms (PR #113661)
Next message: [llvm] [TableGen] Fix validateOperandClass for non Phyical Reg (PR #118146)
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