[llvm] [MachineSink] Add option for aggressive loop sinking (PR #117247)

[Jeffrey Byrnes via llvm-commits]

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@@ -1806,6 +1806,11 @@ class TargetInstrInfo : public MCInstrInfo {
   unsigned defaultDefLatency(const MCSchedModel &SchedModel,
                              const MachineInstr &DefMI) const;
 
+  /// Return true if this instruction is considered low latency.
+  virtual bool isLowLatencyInstruction(const MachineInstr &MI) const {
+    return false;
+  };
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jrbyrnes wrote:

I've used hasLowDefLatency since that's consistent with MachineLICM. That said, it requires InstrItineraryData for it's latency calculations and AMDGPU doesn't use itineraries -- instead we query latency from the SchedModel. 

Implementing this hook I think should be done separately. 1. We would need to implement other hooks in order to have consistent cost model in MachineLICM (e.g. hasHighOperandLatency), 2. This effects the default path.

> Not sure why we have isHighLatencyDef either

I think it gives improved expression since !hasLowDefLatency != isHighLatencyDef


https://github.com/llvm/llvm-project/pull/117247