[llvm] [AMDGPU][True16][CodeGen]Support V2S copy with True16 flow (PR #118037)

[Matt Arsenault via llvm-commits]

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+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck %s
+
+# Ensure READFIRSTLANE is generated, and that its src is REG_SEQUENCE.
+
+---
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arsenm wrote:

Compact register numbers with -run-pass=none. Also avoid the copy of undef, that's going to stress other weird edge cases and is equivalent to IMPLICIT_DEF. Can also do some pre-folding of operands.


But for this an IR test that hits the case would be long term more reliable, both would be useful

https://github.com/llvm/llvm-project/pull/118037