[llvm] [AMDGPU][True16][CodeGen] Undo sub(x, c) to add in true16 flow (PR #118854)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Brox Chen (broxigarchen)

<details>
<summary>Changes</summary>

Undo sub x, c -> add x, -c canonicalization in true16 fow.

This duplicating the pattern from fake16 and implemement the same pattern in true16 format

---
Full diff: https://github.com/llvm/llvm-project/pull/118854.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/VOP3Instructions.td (+5-1) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index 47b60bb0fdab30..ccf6ccf6e5d44a 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -1271,7 +1271,11 @@ let True16Predicate = NotHasTrue16BitInsts, SubtargetPredicate = isGFX10Plus in
 let True16Predicate = UseRealTrue16Insts in {
   def : OpSelBinOpClampPat<uaddsat, V_ADD_NC_U16_t16_e64>;
   def : OpSelBinOpClampPat<usubsat, V_SUB_NC_U16_t16_e64>;
-} // End OtherPredicates = [UseRealTrue16Insts]
+  def : GCNPat<
+    (add i16:$src0, (i16 NegSubInlineIntConst16:$src1)),
+    (V_SUB_NC_U16_t16_e64 0, VSrc_b16:$src0, 0, NegSubInlineIntConst16:$src1, 0, 0)
+  >;
+} // End True16Predicate = UseRealTrue16Insts
 
 let True16Predicate = UseFakeTrue16Insts in {
    def : OpSelBinOpClampPat<uaddsat, V_ADD_NC_U16_fake16_e64>;

``````````

</details>


https://github.com/llvm/llvm-project/pull/118854