[llvm] [X86] Add floating point promotion. (PR #118793)

[via llvm-commits]

================
@@ -2589,6 +2589,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
         setOperationAction(Op, MVT::f32, Promote);
   }
 
+  setOperationPromotedToType(ISD::ATOMIC_LOAD, MVT::f16, MVT::i16);
+  setOperationPromotedToType(ISD::ATOMIC_LOAD, MVT::f32, MVT::i32);
+  setOperationPromotedToType(ISD::ATOMIC_LOAD, MVT::f64, MVT::i64);
----------------
jofrn wrote:

It is reachable during DAG to DAG translation. After scalarization, we promote:
1. `v1f32,ch = AtomicLoad<(load acquire (s32) from %ir.x)> t0, t2`
2. `f32,ch = AtomicLoad<(load acquire (s32) from %ir.x)> t0, t2`
3. `i32,ch = AtomicLoad<(load acquire (s32) from %ir.x)> t0, t2`                                                                                                      

https://github.com/llvm/llvm-project/pull/118793