[llvm] [TRI] Remove reserved registers in getRegPressureSetLimit (PR #118787)

[Sam Elliott via llvm-commits]

https://github.com/lenary commented:

This looks right. Two small changes below

Do you know why this doesn't have as many changes to the RISC-V tests as the RISCV-V specific patch?

https://github.com/llvm/llvm-project/pull/118787