[llvm] [MachineLICM] Precommit a test showing wrong behaviour. (PR #118783)
Mikhail Gudim via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 5 02:37:19 PST 2024
https://github.com/mgudim created https://github.com/llvm/llvm-project/pull/118783
None
>From 1b9b78bc610f48752afa0a955375f5bb773e5e65 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at gmail.com>
Date: Thu, 5 Dec 2024 05:35:09 -0500
Subject: [PATCH] [MachineLICM] Precommit a test showing wrong behaviour.
---
.../RISCV/machinelicm-high-reg-pressure.mir | 223 ++++++++++++++++++
1 file changed, 223 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/machinelicm-high-reg-pressure.mir
diff --git a/llvm/test/CodeGen/RISCV/machinelicm-high-reg-pressure.mir b/llvm/test/CodeGen/RISCV/machinelicm-high-reg-pressure.mir
new file mode 100644
index 00000000000000..e993c0be324184
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/machinelicm-high-reg-pressure.mir
@@ -0,0 +1,223 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc %s -mtriple=riscv64 -run-pass=early-machinelicm -o - | FileCheck %s
+
+# The instruction invariant:gpr = ADDI %y, -1 can be hoisted, but should not because it will increase register pressure beyond the limit.
+---
+name: foo
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: foo
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: liveins: $x10, $x11, $x12
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %n:gpr = COPY $x10
+ ; CHECK-NEXT: %base_addr:gpr = COPY $x11
+ ; CHECK-NEXT: %y:gpr = COPY $x12
+ ; CHECK-NEXT: %zero:gpr = COPY $x0
+ ; CHECK-NEXT: %invariant:gpr = ADDI %y, -1
+ ; CHECK-NEXT: %use_y:gpr = ADDI %y, -2
+ ; CHECK-NEXT: %z:gpr = ADD %use_y, %invariant
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %i:gpr = PHI %n, %bb.0, %i_dec, %bb.1
+ ; CHECK-NEXT: %addr:gpr = ADD %base_addr, %i
+ ; CHECK-NEXT: %x_0:gpr = LD %addr, 0 :: (load (s64))
+ ; CHECK-NEXT: %x_1:gpr = LD %addr, 1 :: (load (s64))
+ ; CHECK-NEXT: %x_2:gpr = LD %addr, 2 :: (load (s64))
+ ; CHECK-NEXT: %x_3:gpr = LD %addr, 3 :: (load (s64))
+ ; CHECK-NEXT: %x_4:gpr = LD %addr, 4 :: (load (s64))
+ ; CHECK-NEXT: %x_5:gpr = LD %addr, 5 :: (load (s64))
+ ; CHECK-NEXT: %x_6:gpr = LD %addr, 6 :: (load (s64))
+ ; CHECK-NEXT: %x_7:gpr = LD %addr, 7 :: (load (s64))
+ ; CHECK-NEXT: %x_8:gpr = LD %addr, 8 :: (load (s64))
+ ; CHECK-NEXT: %x_9:gpr = LD %addr, 9 :: (load (s64))
+ ; CHECK-NEXT: %x_10:gpr = LD %addr, 10 :: (load (s64))
+ ; CHECK-NEXT: %x_11:gpr = LD %addr, 11 :: (load (s64))
+ ; CHECK-NEXT: %x_12:gpr = LD %addr, 12 :: (load (s64))
+ ; CHECK-NEXT: %x_13:gpr = LD %addr, 13 :: (load (s64))
+ ; CHECK-NEXT: %x_14:gpr = LD %addr, 14 :: (load (s64))
+ ; CHECK-NEXT: %x_15:gpr = LD %addr, 15 :: (load (s64))
+ ; CHECK-NEXT: %x_16:gpr = LD %addr, 16 :: (load (s64))
+ ; CHECK-NEXT: %x_17:gpr = LD %addr, 17 :: (load (s64))
+ ; CHECK-NEXT: %x_18:gpr = LD %addr, 18 :: (load (s64))
+ ; CHECK-NEXT: %x_19:gpr = LD %addr, 19 :: (load (s64))
+ ; CHECK-NEXT: %x_20:gpr = LD %addr, 20 :: (load (s64))
+ ; CHECK-NEXT: %x_21:gpr = LD %addr, 21 :: (load (s64))
+ ; CHECK-NEXT: %x_22:gpr = LD %addr, 22 :: (load (s64))
+ ; CHECK-NEXT: %x_23:gpr = LD %addr, 23 :: (load (s64))
+ ; CHECK-NEXT: %x_24:gpr = LD %addr, 24 :: (load (s64))
+ ; CHECK-NEXT: %x_25:gpr = LD %addr, 25 :: (load (s64))
+ ; CHECK-NEXT: %x_26:gpr = LD %addr, 26 :: (load (s64))
+ ; CHECK-NEXT: %x_26_1:gpr = ADDI %x_26, 1
+ ; CHECK-NEXT: %x_25_1:gpr = ADDI %x_25, 1
+ ; CHECK-NEXT: %x_24_1:gpr = ADDI %x_24, 1
+ ; CHECK-NEXT: %x_23_1:gpr = ADDI %x_23, 1
+ ; CHECK-NEXT: %x_22_1:gpr = ADDI %x_22, 1
+ ; CHECK-NEXT: %x_21_1:gpr = ADDI %x_21, 1
+ ; CHECK-NEXT: %x_20_1:gpr = ADDI %x_20, 1
+ ; CHECK-NEXT: %x_19_1:gpr = ADDI %x_19, 1
+ ; CHECK-NEXT: %x_18_1:gpr = ADDI %x_18, 1
+ ; CHECK-NEXT: %x_17_1:gpr = ADDI %x_17, 1
+ ; CHECK-NEXT: %x_16_1:gpr = ADDI %x_16, 1
+ ; CHECK-NEXT: %x_15_1:gpr = ADDI %x_15, 1
+ ; CHECK-NEXT: %x_14_1:gpr = ADDI %x_14, 1
+ ; CHECK-NEXT: %x_13_1:gpr = ADDI %x_13, 1
+ ; CHECK-NEXT: %x_12_1:gpr = ADDI %x_12, 1
+ ; CHECK-NEXT: %x_11_1:gpr = ADDI %x_11, 1
+ ; CHECK-NEXT: %x_10_1:gpr = ADDI %x_10, 1
+ ; CHECK-NEXT: %x_9_1:gpr = ADDI %x_9, 1
+ ; CHECK-NEXT: %x_8_1:gpr = ADDI %x_8, 1
+ ; CHECK-NEXT: %x_7_1:gpr = ADDI %x_7, 1
+ ; CHECK-NEXT: %x_6_1:gpr = ADDI %x_6, 1
+ ; CHECK-NEXT: %x_5_1:gpr = ADDI %x_5, 1
+ ; CHECK-NEXT: %x_4_1:gpr = ADDI %x_4, 1
+ ; CHECK-NEXT: %x_3_1:gpr = ADDI %x_3, 1
+ ; CHECK-NEXT: %x_2_1:gpr = ADDI %x_2, 1
+ ; CHECK-NEXT: %x_1_1:gpr = ADDI %x_1, 1
+ ; CHECK-NEXT: %x_0_1:gpr = ADDI %x_0, 1
+ ; CHECK-NEXT: SD %x_26_1, %addr, 26 :: (store (s64))
+ ; CHECK-NEXT: SD %x_25_1, %addr, 25 :: (store (s64))
+ ; CHECK-NEXT: SD %x_24_1, %addr, 24 :: (store (s64))
+ ; CHECK-NEXT: SD %x_23_1, %addr, 23 :: (store (s64))
+ ; CHECK-NEXT: SD %x_22_1, %addr, 22 :: (store (s64))
+ ; CHECK-NEXT: SD %x_21_1, %addr, 21 :: (store (s64))
+ ; CHECK-NEXT: SD %x_20_1, %addr, 20 :: (store (s64))
+ ; CHECK-NEXT: SD %x_19_1, %addr, 19 :: (store (s64))
+ ; CHECK-NEXT: SD %x_18_1, %addr, 18 :: (store (s64))
+ ; CHECK-NEXT: SD %x_17_1, %addr, 17 :: (store (s64))
+ ; CHECK-NEXT: SD %x_16_1, %addr, 16 :: (store (s64))
+ ; CHECK-NEXT: SD %x_15_1, %addr, 15 :: (store (s64))
+ ; CHECK-NEXT: SD %x_14_1, %addr, 14 :: (store (s64))
+ ; CHECK-NEXT: SD %x_13_1, %addr, 13 :: (store (s64))
+ ; CHECK-NEXT: SD %x_12_1, %addr, 12 :: (store (s64))
+ ; CHECK-NEXT: SD %x_11_1, %addr, 11 :: (store (s64))
+ ; CHECK-NEXT: SD %x_10_1, %addr, 10 :: (store (s64))
+ ; CHECK-NEXT: SD %x_9_1, %addr, 9 :: (store (s64))
+ ; CHECK-NEXT: SD %x_8_1, %addr, 8 :: (store (s64))
+ ; CHECK-NEXT: SD %x_7_1, %addr, 7 :: (store (s64))
+ ; CHECK-NEXT: SD %x_6_1, %addr, 6 :: (store (s64))
+ ; CHECK-NEXT: SD %x_5_1, %addr, 5 :: (store (s64))
+ ; CHECK-NEXT: SD %x_4_1, %addr, 4 :: (store (s64))
+ ; CHECK-NEXT: SD %x_3_1, %addr, 3 :: (store (s64))
+ ; CHECK-NEXT: SD %x_2_1, %addr, 2 :: (store (s64))
+ ; CHECK-NEXT: SD %x_1_1, %addr, 1 :: (store (s64))
+ ; CHECK-NEXT: SD %x_0_1, %addr, 0 :: (store (s64))
+ ; CHECK-NEXT: %i_dec:gpr = ADD %i, %z
+ ; CHECK-NEXT: BEQ %i_dec, %zero, %bb.1
+ ; CHECK-NEXT: PseudoBR %bb.2
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: PseudoRET
+ bb.0.entry:
+ successors: %bb.1(0x50000000)
+ liveins: $x10, $x11, $x12
+
+ %n:gpr = COPY $x10
+ %base_addr:gpr = COPY $x11
+ %y:gpr = COPY $x12
+ %zero:gpr = COPY $x0
+
+ bb.1:
+ successors: %bb.1, %bb.2
+ %i:gpr = PHI %n, %bb.0, %i_dec, %bb.1
+ %addr:gpr = ADD %base_addr, %i
+
+ %x_0:gpr = LD %addr, 0 :: (load (s64))
+ %x_1:gpr = LD %addr, 1 :: (load (s64))
+ %x_2:gpr = LD %addr, 2 :: (load (s64))
+ %x_3:gpr = LD %addr, 3 :: (load (s64))
+ %x_4:gpr = LD %addr, 4 :: (load (s64))
+ %x_5:gpr = LD %addr, 5 :: (load (s64))
+ %x_6:gpr = LD %addr, 6 :: (load (s64))
+ %x_7:gpr = LD %addr, 7 :: (load (s64))
+ %x_8:gpr = LD %addr, 8 :: (load (s64))
+ %x_9:gpr = LD %addr, 9 :: (load (s64))
+ %x_10:gpr = LD %addr, 10 :: (load (s64))
+ %x_11:gpr = LD %addr, 11 :: (load (s64))
+ %x_12:gpr = LD %addr, 12 :: (load (s64))
+ %x_13:gpr = LD %addr, 13 :: (load (s64))
+ %x_14:gpr = LD %addr, 14 :: (load (s64))
+ %x_15:gpr = LD %addr, 15 :: (load (s64))
+ %x_16:gpr = LD %addr, 16 :: (load (s64))
+ %x_17:gpr = LD %addr, 17 :: (load (s64))
+ %x_18:gpr = LD %addr, 18 :: (load (s64))
+ %x_19:gpr = LD %addr, 19 :: (load (s64))
+ %x_20:gpr = LD %addr, 20 :: (load (s64))
+ %x_21:gpr = LD %addr, 21 :: (load (s64))
+ %x_22:gpr = LD %addr, 22 :: (load (s64))
+ %x_23:gpr = LD %addr, 23 :: (load (s64))
+ %x_24:gpr = LD %addr, 24 :: (load (s64))
+ %x_25:gpr = LD %addr, 25 :: (load (s64))
+ %x_26:gpr = LD %addr, 26 :: (load (s64))
+
+
+ %x_26_1:gpr = ADDI %x_26, 1
+ %x_25_1:gpr = ADDI %x_25, 1
+ %x_24_1:gpr = ADDI %x_24, 1
+ %x_23_1:gpr = ADDI %x_23, 1
+ %x_22_1:gpr = ADDI %x_22, 1
+ %x_21_1:gpr = ADDI %x_21, 1
+ %x_20_1:gpr = ADDI %x_20, 1
+ %x_19_1:gpr = ADDI %x_19, 1
+ %x_18_1:gpr = ADDI %x_18, 1
+ %x_17_1:gpr = ADDI %x_17, 1
+ %x_16_1:gpr = ADDI %x_16, 1
+ %x_15_1:gpr = ADDI %x_15, 1
+ %x_14_1:gpr = ADDI %x_14, 1
+ %x_13_1:gpr = ADDI %x_13, 1
+ %x_12_1:gpr = ADDI %x_12, 1
+ %x_11_1:gpr = ADDI %x_11, 1
+ %x_10_1:gpr = ADDI %x_10, 1
+ %x_9_1:gpr = ADDI %x_9, 1
+ %x_8_1:gpr = ADDI %x_8, 1
+ %x_7_1:gpr = ADDI %x_7, 1
+ %x_6_1:gpr = ADDI %x_6, 1
+ %x_5_1:gpr = ADDI %x_5, 1
+ %x_4_1:gpr = ADDI %x_4, 1
+ %x_3_1:gpr = ADDI %x_3, 1
+ %x_2_1:gpr = ADDI %x_2, 1
+ %x_1_1:gpr = ADDI %x_1, 1
+ %x_0_1:gpr = ADDI %x_0, 1
+
+ %invariant:gpr = ADDI %y, -1
+
+ SD %x_26_1, %addr, 26 :: (store (s64))
+ SD %x_25_1, %addr, 25 :: (store (s64))
+ SD %x_24_1, %addr, 24 :: (store (s64))
+ SD %x_23_1, %addr, 23 :: (store (s64))
+ SD %x_22_1, %addr, 22 :: (store (s64))
+ SD %x_21_1, %addr, 21 :: (store (s64))
+ SD %x_20_1, %addr, 20 :: (store (s64))
+ SD %x_19_1, %addr, 19 :: (store (s64))
+ SD %x_18_1, %addr, 18 :: (store (s64))
+ SD %x_17_1, %addr, 17 :: (store (s64))
+ SD %x_16_1, %addr, 16 :: (store (s64))
+ SD %x_15_1, %addr, 15 :: (store (s64))
+ SD %x_14_1, %addr, 14 :: (store (s64))
+ SD %x_13_1, %addr, 13 :: (store (s64))
+ SD %x_12_1, %addr, 12 :: (store (s64))
+ SD %x_11_1, %addr, 11 :: (store (s64))
+ SD %x_10_1, %addr, 10 :: (store (s64))
+ SD %x_9_1, %addr, 9 :: (store (s64))
+ SD %x_8_1, %addr, 8 :: (store (s64))
+ SD %x_7_1, %addr, 7 :: (store (s64))
+ SD %x_6_1, %addr, 6 :: (store (s64))
+ SD %x_5_1, %addr, 5 :: (store (s64))
+ SD %x_4_1, %addr, 4 :: (store (s64))
+ SD %x_3_1, %addr, 3 :: (store (s64))
+ SD %x_2_1, %addr, 2 :: (store (s64))
+ SD %x_1_1, %addr, 1 :: (store (s64))
+ SD %x_0_1, %addr, 0 :: (store (s64))
+
+ %use_y:gpr = ADDI %y, -2
+ %z:gpr = ADD %use_y, %invariant
+ %i_dec:gpr = ADD %i, %z
+ BEQ %i_dec, %zero, %bb.1
+ PseudoBR %bb.2
+
+ bb.2:
+ PseudoRET
+...
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