[llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF (PR #113214)
Amy Kwan via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 4 20:40:48 PST 2024
https://github.com/amy-kwan updated https://github.com/llvm/llvm-project/pull/113214
>From b3ab7faf074ae8c8f1b77dc4ae64c5f50d73bfa6 Mon Sep 17 00:00:00 2001
From: Amy Kwan <amy.kwan1 at ibm.com>
Date: Mon, 21 Oct 2024 15:21:19 -0500
Subject: [PATCH 1/5] [PowerPC][AIX] Emit PowerPC version for XCOFF
This PR emits implements the ability to emit the PPC version for both assembly
and object files on AIX.
Furthermore, this PR is intended to be a commandeered version of Esme's previous PR:
https://github.com/llvm/llvm-project/pull/95510
---
llvm/include/llvm/BinaryFormat/XCOFF.h | 31 ++++++++-
llvm/include/llvm/MC/MCAssembler.h | 6 ++
llvm/include/llvm/MC/MCObjectStreamer.h | 1 +
llvm/include/llvm/MC/MCObjectWriter.h | 3 +
llvm/include/llvm/MC/MCStreamer.h | 3 +
llvm/lib/BinaryFormat/XCOFF.cpp | 59 +++++++++++++++++
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 26 +++++++-
llvm/lib/MC/MCAsmStreamer.cpp | 9 +++
llvm/lib/MC/MCObjectStreamer.cpp | 4 ++
llvm/lib/MC/MCStreamer.cpp | 3 +
llvm/lib/MC/XCOFFObjectWriter.cpp | 7 +--
llvm/test/CodeGen/PowerPC/aix-cpu-version.ll | 17 +++++
llvm/test/CodeGen/PowerPC/aix-extern-weak.ll | 3 +-
llvm/test/CodeGen/PowerPC/aix-extern.ll | 3 +-
llvm/test/CodeGen/PowerPC/aix-filename-c.ll | 63 ++++++++++++++++---
llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll | 7 +--
llvm/test/CodeGen/PowerPC/aix-filename-f.ll | 7 +--
llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll | 2 +-
.../CodeGen/PowerPC/aix-llvm-intrinsic.ll | 3 +-
.../PowerPC/aix-tls-xcoff-variables.ll | 2 +-
llvm/test/CodeGen/PowerPC/aix-weak.ll | 3 +-
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll | 8 +--
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll | 3 +-
llvm/test/DebugInfo/XCOFF/empty.ll | 2 +
llvm/test/DebugInfo/XCOFF/explicit-section.ll | 1 +
.../test/DebugInfo/XCOFF/function-sections.ll | 1 +
.../llvm-readobj/XCOFF/symbols-invalid.test | 2 +-
.../tools/llvm-readobj/XCOFF/symbols.test | 2 +-
.../tools/llvm-readobj/XCOFF/symbols64.test | 2 +-
.../tools/yaml2obj/XCOFF/aux-symbols.yaml | 12 ++--
llvm/tools/llvm-readobj/XCOFFDumper.cpp | 7 ++-
31 files changed, 248 insertions(+), 54 deletions(-)
create mode 100644 llvm/test/CodeGen/PowerPC/aix-cpu-version.ll
diff --git a/llvm/include/llvm/BinaryFormat/XCOFF.h b/llvm/include/llvm/BinaryFormat/XCOFF.h
index bbcd8a4f29ae91..b48976769c0c47 100644
--- a/llvm/include/llvm/BinaryFormat/XCOFF.h
+++ b/llvm/include/llvm/BinaryFormat/XCOFF.h
@@ -333,10 +333,33 @@ enum CFileLangId : uint8_t {
TB_CPLUSPLUS = 9 ///< C++ language.
};
+// XCOFF specific CPU IDs, defined in AIX OS header: `/usr/include/aouthdr.h`.
enum CFileCpuId : uint8_t {
- TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
- TCPU_COM = 3, ///< POWER and PowerPC architecture common.
- TCPU_970 = 19 ///< PPC970 - PowerPC 64-bit architecture.
+ TCPU_INVALID = 0, ///< Invalid id - assumes POWER for old objects.
+ TCPU_PPC = 1, ///< PowerPC common architecture 32 bit mode.
+ TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
+ TCPU_COM = 3, ///< POWER and PowerPC architecture common.
+ TCPU_PWR = 4, ///< POWER common architecture objects.
+ TCPU_ANY = 5, ///< Mixture of any incompatable POWER
+ ///< and PowerPC architecture implementations.
+ TCPU_601 = 6, ///< 601 implementation of PowerPC architecture.
+ TCPU_603 = 7, ///< 603 implementation of PowerPC architecture.
+ TCPU_604 = 8, ///< 604 implementation of PowerPC architecture.
+
+ // The following are PowerPC 64-bit architectures.
+ TCPU_620 = 16,
+ TCPU_A35 = 17,
+ TCPU_PWR5 = 18,
+ TCPU_970 = 19,
+ TCPU_PWR6 = 20,
+ TCPU_PWR5X = 22,
+ TCPU_PWR6E = 23,
+ TCPU_PWR7 = 24,
+ TCPU_PWR8 = 25,
+ TCPU_PWR9 = 26,
+ TCPU_PWR10 = 27,
+
+ TCPU_PWRX = 224 ///< RS2 implementation of POWER architecture.
};
enum SymbolAuxType : uint8_t {
@@ -350,6 +373,7 @@ enum SymbolAuxType : uint8_t {
StringRef getMappingClassString(XCOFF::StorageMappingClass SMC);
StringRef getRelocationTypeString(XCOFF::RelocationType Type);
+StringRef getTCPUString(XCOFF::CFileCpuId TCPU);
Expected<SmallString<32>> parseParmsType(uint32_t Value, unsigned FixedParmsNum,
unsigned FloatingParmsNum);
Expected<SmallString<32>> parseParmsTypeWithVecInfo(uint32_t Value,
@@ -468,6 +492,7 @@ enum ExtendedTBTableFlag : uint8_t {
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId);
SmallString<32> getExtendedTBTableFlagString(uint8_t Flag);
+XCOFF::CFileCpuId getCpuID(StringRef CPU);
struct CsectProperties {
CsectProperties(StorageMappingClass SMC, SymbolType ST)
diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h
index a68eb49fda2825..e9ed64f36e3a0d 100644
--- a/llvm/include/llvm/MC/MCAssembler.h
+++ b/llvm/include/llvm/MC/MCAssembler.h
@@ -70,6 +70,9 @@ class MCAssembler {
SmallVector<const MCSymbol *, 0> Symbols;
+ // PPC CPU type.
+ std::string CPU;
+
MCDwarfLineTableParams LTParams;
/// The set of function symbols for which a .thumb_func directive has
@@ -225,6 +228,9 @@ class MCAssembler {
return make_pointee_range(Symbols);
}
+ void setCPU(std::string TargetCPU) { CPU = std::move(TargetCPU); }
+ StringRef getCPU() const { return CPU; }
+
bool registerSection(MCSection &Section);
bool registerSymbol(const MCSymbol &Symbol);
diff --git a/llvm/include/llvm/MC/MCObjectStreamer.h b/llvm/include/llvm/MC/MCObjectStreamer.h
index aaa13be6b29868..0b0b3477d03273 100644
--- a/llvm/include/llvm/MC/MCObjectStreamer.h
+++ b/llvm/include/llvm/MC/MCObjectStreamer.h
@@ -185,6 +185,7 @@ class MCObjectStreamer : public MCStreamer {
void emitFileDirective(StringRef Filename) override;
void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) override;
+ void emitMachineDirective(StringRef CPU) override;
void emitAddrsig() override;
void emitAddrsigSym(const MCSymbol *Sym) override;
diff --git a/llvm/include/llvm/MC/MCObjectWriter.h b/llvm/include/llvm/MC/MCObjectWriter.h
index 81ba6ffd5d44e4..2306483dc9e8e3 100644
--- a/llvm/include/llvm/MC/MCObjectWriter.h
+++ b/llvm/include/llvm/MC/MCObjectWriter.h
@@ -36,6 +36,8 @@ class MCObjectWriter {
SmallVector<std::pair<std::string, size_t>, 0> FileNames;
// XCOFF specific: Optional compiler version.
std::string CompilerVersion;
+ // AIX specific: CPU type.
+ std::string CPUType;
std::vector<const MCSymbol *> AddrsigSyms;
bool EmitAddrsigSection = false;
bool SubsectionsViaSymbols = false;
@@ -100,6 +102,7 @@ class MCObjectWriter {
void setCompilerVersion(StringRef CompilerVers) {
CompilerVersion = CompilerVers;
}
+ void setCPU(StringRef TargetCPU) { CPUType = TargetCPU; }
/// Tell the object writer to emit an address-significance table during
/// writeObject(). If this function is not called, all symbols are treated as
diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h
index cfb31a76218425..bf6b06d8c8431f 100644
--- a/llvm/include/llvm/MC/MCStreamer.h
+++ b/llvm/include/llvm/MC/MCStreamer.h
@@ -873,6 +873,9 @@ class MCStreamer {
virtual void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description);
+ // Emit '.machine "CPU"' assembler directive.
+ virtual void emitMachineDirective(StringRef CPU);
+
/// Emit the "identifiers" directive. This implements the
/// '.ident "version foo"' assembler directive.
virtual void emitIdent(StringRef IdentString) {}
diff --git a/llvm/lib/BinaryFormat/XCOFF.cpp b/llvm/lib/BinaryFormat/XCOFF.cpp
index 6b11ab2ff96bca..e0a4471bdb9c35 100644
--- a/llvm/lib/BinaryFormat/XCOFF.cpp
+++ b/llvm/lib/BinaryFormat/XCOFF.cpp
@@ -9,8 +9,10 @@
#include "llvm/BinaryFormat/XCOFF.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringSwitch.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/Error.h"
+#include "llvm/TargetParser/PPCTargetParser.h"
using namespace llvm;
@@ -107,6 +109,63 @@ StringRef XCOFF::getNameForTracebackTableLanguageId(
}
#undef LANG_CASE
+XCOFF::CFileCpuId XCOFF::getCpuID(StringRef CPUName) {
+ StringRef CPU = PPC::normalizeCPUName(CPUName);
+ return StringSwitch<XCOFF::CFileCpuId>(CPU)
+ .Cases("generic", "COM", XCOFF::TCPU_COM)
+ .Case("601", XCOFF::TCPU_601)
+ .Cases("602", "603", "603e", "603ev", XCOFF::TCPU_603)
+ .Cases("604", "604e", XCOFF::TCPU_604)
+ .Case("620", XCOFF::TCPU_620)
+ .Case("970", XCOFF::TCPU_970)
+ .Cases("a2", "g3", "g4", "g5", "e500", XCOFF::TCPU_COM)
+ .Cases("pwr3", "pwr4", XCOFF::TCPU_COM)
+ .Cases("pwr5", "PWR5", XCOFF::TCPU_PWR5)
+ .Cases("pwr5x", "PWR5X", XCOFF::TCPU_PWR5X)
+ .Cases("pwr6", "PWR6", XCOFF::TCPU_PWR6)
+ .Cases("pwr6x", "PWR6E", XCOFF::TCPU_PWR6E)
+ .Cases("pwr7", "PWR7", XCOFF::TCPU_PWR7)
+ .Cases("pwr8", "PWR8", XCOFF::TCPU_PWR8)
+ .Cases("pwr9", "PWR9", XCOFF::TCPU_PWR9)
+ .Cases("pwr10", "PWR10", XCOFF::TCPU_PWR10)
+ .Cases("ppc", "PPC", "ppc32", "ppc64", XCOFF::TCPU_COM)
+ .Case("ppc64le", XCOFF::TCPU_PWR8)
+ .Case("future", XCOFF::TCPU_PWR10)
+ .Cases("any", "ANY", XCOFF::TCPU_ANY)
+ .Default(XCOFF::TCPU_INVALID);
+}
+
+#define TCPU_CASE(A) \
+ case XCOFF::TCPU_##A: \
+ return #A;
+StringRef XCOFF::getTCPUString(XCOFF::CFileCpuId TCPU) {
+ switch (TCPU) {
+ TCPU_CASE(INVALID)
+ TCPU_CASE(PPC)
+ TCPU_CASE(PPC64)
+ TCPU_CASE(COM)
+ TCPU_CASE(PWR)
+ TCPU_CASE(ANY)
+ TCPU_CASE(601)
+ TCPU_CASE(603)
+ TCPU_CASE(604)
+ TCPU_CASE(620)
+ TCPU_CASE(A35)
+ TCPU_CASE(PWR5)
+ TCPU_CASE(970)
+ TCPU_CASE(PWR6)
+ TCPU_CASE(PWR5X)
+ TCPU_CASE(PWR6E)
+ TCPU_CASE(PWR7)
+ TCPU_CASE(PWR8)
+ TCPU_CASE(PWR9)
+ TCPU_CASE(PWR10)
+ TCPU_CASE(PWRX)
+ }
+ return "INVALID";
+}
+#undef TCPU_CASE
+
Expected<SmallString<32>> XCOFF::parseParmsType(uint32_t Value,
unsigned FixedParmsNum,
unsigned FloatingParmsNum) {
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 3072edc5088e2a..9a12953f54af6b 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -120,6 +120,7 @@
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
+#include "llvm/TargetParser/PPCTargetParser.h"
#include "llvm/TargetParser/Triple.h"
#include <algorithm>
#include <cassert>
@@ -526,9 +527,28 @@ bool AsmPrinter::doInitialization(Module &M) {
}
}
- // On AIX, emit bytes for llvm.commandline metadata after .file so that the
- // C_INFO symbol is preserved if any csect is kept by the linker.
- if (TM.getTargetTriple().isOSBinFormatXCOFF()) {
+ if (Target.isOSBinFormatXCOFF()) {
+ // Emit .machine directive on AIX.
+ XCOFF::CFileCpuId TargetCpuId = XCOFF::TCPU_INVALID;
+ // Walk through the "target-cpu" attribute of functions and use the newest
+ // level as the CPU of the module.
+ for (auto &F : M) {
+ XCOFF::CFileCpuId FunCpuId =
+ XCOFF::getCpuID(TM.getSubtargetImpl(F)->getCPU());
+ if (FunCpuId > TargetCpuId)
+ TargetCpuId = FunCpuId;
+ }
+ // If there is no "target-cpu" attribute in functions, take the "-mcpu"
+ // value. If both are omitted, use getNormalizedPPCTargetCPU() to determine
+ // the default CPU.
+ if (!TargetCpuId)
+ TargetCpuId = XCOFF::getCpuID(TM.getTargetCPU().empty()
+ ? PPC::getNormalizedPPCTargetCPU(Target)
+ : TM.getTargetCPU());
+ OutStreamer->emitMachineDirective(XCOFF::getTCPUString(TargetCpuId));
+
+ // On AIX, emit bytes for llvm.commandline metadata after .file so that the
+ // C_INFO symbol is preserved if any csect is kept by the linker.
emitModuleCommandLines(M);
// Now we can generate section information.
OutStreamer->initSections(false, *TM.getMCSubtargetInfo());
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index d48b384f21cbce..9c7d9e68762a16 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -288,6 +288,9 @@ class MCAsmStreamer final : public MCStreamer {
void emitFileDirective(StringRef Filename) override;
void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) override;
+
+ void emitMachineDirective(StringRef CPU) override;
+
Expected<unsigned> tryEmitDwarfFileDirective(
unsigned FileNo, StringRef Directory, StringRef Filename,
std::optional<MD5::MD5Result> Checksum = std::nullopt,
@@ -1630,6 +1633,12 @@ void MCAsmStreamer::emitFileDirective(StringRef Filename,
EmitEOL();
}
+void MCAsmStreamer::emitMachineDirective(StringRef CPU) {
+ OS << "\t.machine\t";
+ PrintQuotedString(CPU, OS);
+ EmitEOL();
+}
+
void MCAsmStreamer::printDwarfFileDirective(
unsigned FileNo, StringRef Directory, StringRef Filename,
std::optional<MD5::MD5Result> Checksum, std::optional<StringRef> Source,
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index b2b21435fa4af4..b13967d6860522 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -804,6 +804,10 @@ void MCObjectStreamer::emitFileDirective(StringRef Filename,
// with the integrated assembler.
}
+void MCObjectStreamer::emitMachineDirective(StringRef CPU) {
+ getAssembler().getWriter().setCPU(CPU);
+}
+
void MCObjectStreamer::emitAddrsig() {
getAssembler().getWriter().emitAddrsigSection();
}
diff --git a/llvm/lib/MC/MCStreamer.cpp b/llvm/lib/MC/MCStreamer.cpp
index df1b160f9df28e..c59170182fa67d 100644
--- a/llvm/lib/MC/MCStreamer.cpp
+++ b/llvm/lib/MC/MCStreamer.cpp
@@ -1208,6 +1208,9 @@ void MCStreamer::emitFileDirective(StringRef Filename,
StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) {
}
+void MCStreamer::emitMachineDirective(StringRef CPU) {
+ llvm_unreachable("this directive only supported on XCOFF targets");
+}
void MCStreamer::emitCOFFSymbolStorageClass(int StorageClass) {
llvm_unreachable("this directive only supported on COFF targets");
}
diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp
index 5d8f3dbdaadad5..7f8e1425b6db3c 100644
--- a/llvm/lib/MC/XCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/XCOFFObjectWriter.cpp
@@ -1180,11 +1180,8 @@ void XCOFFWriter::writeSymbolTable(MCAssembler &Asm) {
LangID = XCOFF::TB_Fortran;
else
LangID = XCOFF::TB_CPLUSPLUS;
- uint8_t CpuID;
- if (is64Bit())
- CpuID = XCOFF::TCPU_PPC64;
- else
- CpuID = XCOFF::TCPU_COM;
+
+ uint8_t CpuID = XCOFF::getCpuID(CPUType);
int NumberOfFileAuxEntries = 1;
if (!Vers.empty())
diff --git a/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll b/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll
new file mode 100644
index 00000000000000..f9ef6c642b0c1f
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+
+; CHECK: .file "1.c"
+; CHECK-NEXT: .machine "PWR8"
+; CHECK-NEXT: .csect ..text..[PR],5
+; CHECK-NEXT: .rename ..text..[PR],""
+
+source_filename = "1.c"
+
+define dso_local signext i32 @main() #0 {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, ptr %retval, align 4
+ ret i32 0
+}
+
+attributes #0 = {"target-cpu"="pwr8"}
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
index 173c58567e40b3..0cca7eab910473 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
@@ -68,8 +68,7 @@ declare extern_weak void @foo_ext_weak(ptr)
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll
index ff2a803608807c..71b17ad35c70d7 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll
@@ -91,8 +91,7 @@ declare i32 @bar_extern(ptr)
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
index c4202a0c58cee3..2c6d1941fa992e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
@@ -1,12 +1,57 @@
-; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
-; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr9 < %s | FileCheck --check-prefixes=ASM %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr9 -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ32 %s
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr9 -filetype=obj -o %t64.o < %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ64 %s
source_filename = "1.c"
-; OBJ: Name: .file
-; OBJ: Source Language ID: TB_C (0x0)
-; OBJ32: CPU Version ID: TCPU_COM (0x3)
-; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
-; OBJ: Name: 1.c
+; ASM: .file "1.c",,"LLVM{{.*}}"
+; ASM-NEXT: .machine "PWR9"
+; ASM-NEXT: .csect ..text..[PR],5
+; ASM-NEXT: .rename ..text..[PR],""
+
+; OBJ32: Symbol {
+; OBJ32-NEXT: Index: 0
+; OBJ32-NEXT: Name: .file
+; OBJ32-NEXT: Value (SymbolTableIndex): 0x0
+; OBJ32-NEXT: Section: N_DEBUG
+; OBJ32-NEXT: Source Language ID: TB_C (0x0)
+; OBJ32-NEXT: CPU Version ID: TCPU_PWR9 (0x1A)
+; OBJ32-NEXT: StorageClass: C_FILE (0x67)
+; OBJ32-NEXT: NumberOfAuxEntries: 2
+; OBJ32-NEXT: File Auxiliary Entry {
+; OBJ32-NEXT: Index: 1
+; OBJ32-NEXT: Name: 1.c
+; OBJ32-NEXT: Type: XFT_FN (0x0)
+; OBJ32-NEXT: }
+; OBJ32-NEXT: File Auxiliary Entry {
+; OBJ32-NEXT: Index: 2
+; OBJ32-NEXT: Name: LLVM
+; OBJ32-NEXT: Type: XFT_CV (0x2)
+; OBJ32-NEXT: }
+; OBJ32-NEXT: }
+
+; OBJ64: Symbol {
+; OBJ64-NEXT: Index: 0
+; OBJ64-NEXT: Name: .file
+; OBJ64-NEXT: Value (SymbolTableIndex): 0x0
+; OBJ64-NEXT: Section: N_DEBUG
+; OBJ64-NEXT: Source Language ID: TB_C (0x0)
+; OBJ64-NEXT: CPU Version ID: TCPU_PWR9 (0x1A)
+; OBJ64-NEXT: StorageClass: C_FILE (0x67)
+; OBJ64-NEXT: NumberOfAuxEntries: 2
+; OBJ64-NEXT: File Auxiliary Entry {
+; OBJ64-NEXT: Index: 1
+; OBJ64-NEXT: Name: 1.c
+; OBJ64-NEXT: Type: XFT_FN (0x0)
+; OBJ64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; OBJ64-NEXT: }
+; OBJ64-NEXT: File Auxiliary Entry {
+; OBJ64-NEXT: Index: 2
+; OBJ64-NEXT: Name: LLVM
+; OBJ64-NEXT: Type: XFT_CV (0x2)
+; OBJ64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; OBJ64-NEXT: }
+; OBJ64-NEXT: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll b/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
index 802281b6c1eaa4..873619d20cd2c8 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
@@ -1,12 +1,11 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ %s
source_filename = "1.cpp"
; OBJ: Name: .file
; OBJ: Source Language ID: TB_CPLUSPLUS (0x9)
-; OBJ32: CPU Version ID: TCPU_COM (0x3)
-; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: CPU Version ID: TCPU_PWR7 (0x18)
; OBJ: Name: 1.cpp
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-f.ll b/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
index 99036bde702d6e..1167148d21a7fa 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
@@ -1,12 +1,11 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ %s
source_filename = "1.f95"
; OBJ: Name: .file
; OBJ: Source Language ID: TB_Fortran (0x1)
-; OBJ32: CPU Version ID: TCPU_COM (0x3)
-; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: CPU Version ID: TCPU_PWR7 (0x18)
; OBJ: Name: 1.f95
diff --git a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
index 4cca1b4d6f7bad..50221acc2b3ad8 100644
--- a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
@@ -17,7 +17,7 @@ entry:
; CHECK-NEXT: Value (SymbolTableIndex): 0x0
; CHECK-NEXT: Section: N_DEBUG
; CHECK-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECK-NEXT: CPU Version ID: TCPU_COM (0x3)
+; CHECK-NEXT: CPU Version ID: TCPU_PWR7 (0x18)
; CHECK-NEXT: StorageClass: C_FILE (0x67)
; CHECK-NEXT: NumberOfAuxEntries: 2
; CHECK-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
index 50677f36e3f7a8..e2a3febd6c976c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
@@ -44,8 +44,7 @@ declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
index f9a1a61617761d..3c84aa1225d2e4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
@@ -70,7 +70,7 @@
; SYMS-NEXT: Value (SymbolTableIndex): 0x0
; SYMS-NEXT: Section: N_DEBUG
; SYMS-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYMS-NEXT: CPU Version ID: TCPU_COM (0x3)
+; SYMS-NEXT: CPU Version ID: TCPU_PWR7 (0x18)
; SYMS-NEXT: StorageClass: C_FILE (0x67)
; SYMS-NEXT: NumberOfAuxEntries: 2
; SYMS: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll
index 7bf80ad19e9e01..3b2917ec972849 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll
@@ -104,8 +104,7 @@ entry:
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index de937386b8b7d0..f9f72f8d3507d3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -45,8 +45,9 @@
; CHECK-NOT: .toc
-; CHECK: .file
-; CHECK-NEXT: .csect ..text..[PR],5
+; CHECK: .file
+; CHECK-NEXT: .machine "PWR7"
+; CHECK-NEXT: .csect ..text..[PR],5
; CHECK: .csect .data[RW],5
; CHECK-NEXT: .globl ivar
@@ -212,8 +213,7 @@
; SYMS-NEXT: Value (SymbolTableIndex): 0x0
; SYMS-NEXT: Section: N_DEBUG
; SYMS-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYMS32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; SYMS64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; SYMS-NEXT: CPU Version ID: TCPU_PWR7 (0x18)
; SYMS-NEXT: StorageClass: C_FILE (0x67)
; SYMS-NEXT: NumberOfAuxEntries: 2
; SYMS-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 950d65b7e2913e..77dd56f803117b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -163,8 +163,7 @@ declare i32 @bar(i32)
; SYM-NEXT: Value (SymbolTableIndex): 0x0
; SYM-NEXT: Section: N_DEBUG
; SYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; SYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; SYM-NEXT: CPU Version ID: TCPU_COM (0x3)
; SYM-NEXT: StorageClass: C_FILE (0x67)
; SYM-NEXT: NumberOfAuxEntries: 2
; SYM-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/DebugInfo/XCOFF/empty.ll b/llvm/test/DebugInfo/XCOFF/empty.ll
index 660a1fac6af895..c18bc559d31153 100644
--- a/llvm/test/DebugInfo/XCOFF/empty.ll
+++ b/llvm/test/DebugInfo/XCOFF/empty.ll
@@ -35,6 +35,7 @@ entry:
!12 = !DILocation(line: 3, column: 3, scope: !8)
; ASM32: .file "1.c"
+; ASM32-NEXT: .machine "PWR7"
; ASM32-NEXT: .csect ..text..[PR],5
; ASM32-NEXT: .rename ..text..[PR],""
; ASM32-NEXT: .globl main[DS] # -- Begin function main
@@ -237,6 +238,7 @@ entry:
; ASM32-NEXT: L..debug_line_end0:
; ASM64: .file "1.c"
+; ASM64-NEXT: .machine "PWR7"
; ASM64-NEXT: .csect ..text..[PR],5
; ASM64-NEXT: .rename ..text..[PR],""
; ASM64-NEXT: .globl main[DS] # -- Begin function main
diff --git a/llvm/test/DebugInfo/XCOFF/explicit-section.ll b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
index 345f6f117321b5..3aefb0455b6b9a 100644
--- a/llvm/test/DebugInfo/XCOFF/explicit-section.ll
+++ b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
@@ -43,6 +43,7 @@ entry:
!16 = !DILocation(line: 3, column: 3, scope: !14)
; CHECK: .file "2.c"
+; CHECK-NEXT: .machine "PWR7"
; CHECK-NEXT: .csect ..text..[PR],5
; CHECK-NEXT: .rename ..text..[PR],""
; CHECK-NEXT: .globl bar[DS] # -- Begin function bar
diff --git a/llvm/test/DebugInfo/XCOFF/function-sections.ll b/llvm/test/DebugInfo/XCOFF/function-sections.ll
index 6b0bf6be7a2524..07362e19f72996 100644
--- a/llvm/test/DebugInfo/XCOFF/function-sections.ll
+++ b/llvm/test/DebugInfo/XCOFF/function-sections.ll
@@ -38,6 +38,7 @@ entry:
!14 = !DILocation(line: 8, column: 3, scope: !13)
; CHECK: .file "1.c"
+; CHECK-NEXT: .machine "PWR7"
; CHECK-NEXT: .csect ..text..[PR],5
; CHECK-NEXT: .rename ..text..[PR],""
; CHECK-NEXT: .csect .foo[PR],5
diff --git a/llvm/test/tools/llvm-readobj/XCOFF/symbols-invalid.test b/llvm/test/tools/llvm-readobj/XCOFF/symbols-invalid.test
index 3db88031492421..756417834b424b 100644
--- a/llvm/test/tools/llvm-readobj/XCOFF/symbols-invalid.test
+++ b/llvm/test/tools/llvm-readobj/XCOFF/symbols-invalid.test
@@ -41,7 +41,7 @@ Symbols:
# CASE5-NEXT: Value (SymbolTableIndex): 0x0
# CASE5-NEXT: Section: N_UNDEF
# CASE5-NEXT: Source Language ID: TB_C (0x0)
-# CASE5-NEXT: CPU Version ID: 0x0
+# CASE5-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# CASE5-NEXT: StorageClass: C_FILE (0x67)
# CASE5-NEXT: NumberOfAuxEntries: 1
# CASE5-NEXT: !Unexpected raw auxiliary entry data:
diff --git a/llvm/test/tools/llvm-readobj/XCOFF/symbols.test b/llvm/test/tools/llvm-readobj/XCOFF/symbols.test
index 89439a3d0f02d4..71347a85f1ba55 100644
--- a/llvm/test/tools/llvm-readobj/XCOFF/symbols.test
+++ b/llvm/test/tools/llvm-readobj/XCOFF/symbols.test
@@ -170,7 +170,7 @@ Symbols:
# SYMBOL32-NEXT: Value (SymbolTableIndex): 0x0
# SYMBOL32-NEXT: Section: N_DEBUG
# SYMBOL32-NEXT: Source Language ID: TB_C (0x0)
-# SYMBOL32-NEXT: CPU Version ID: 0x0
+# SYMBOL32-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# SYMBOL32-NEXT: StorageClass: C_FILE (0x67)
# SYMBOL32-NEXT: NumberOfAuxEntries: 3
# SYMBOL32-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/tools/llvm-readobj/XCOFF/symbols64.test b/llvm/test/tools/llvm-readobj/XCOFF/symbols64.test
index 591c131063fe30..2b9edb3829af8d 100644
--- a/llvm/test/tools/llvm-readobj/XCOFF/symbols64.test
+++ b/llvm/test/tools/llvm-readobj/XCOFF/symbols64.test
@@ -145,7 +145,7 @@ Symbols:
# SYMBOL64-NEXT: Value (SymbolTableIndex): 0x0
# SYMBOL64-NEXT: Section: N_DEBUG
# SYMBOL64-NEXT: Source Language ID: TB_C (0x0)
-# SYMBOL64-NEXT: CPU Version ID: 0x0
+# SYMBOL64-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# SYMBOL64-NEXT: StorageClass: C_FILE (0x67)
# SYMBOL64-NEXT: NumberOfAuxEntries: 3
# SYMBOL64-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/tools/yaml2obj/XCOFF/aux-symbols.yaml b/llvm/test/tools/yaml2obj/XCOFF/aux-symbols.yaml
index 04c774dcc3ae26..ab9478de8f215e 100644
--- a/llvm/test/tools/yaml2obj/XCOFF/aux-symbols.yaml
+++ b/llvm/test/tools/yaml2obj/XCOFF/aux-symbols.yaml
@@ -69,7 +69,7 @@
# DEFAULT32-NEXT: Value (SymbolTableIndex): 0x0
# DEFAULT32-NEXT: Section: N_UNDEF
# DEFAULT32-NEXT: Source Language ID: TB_C (0x0)
-# DEFAULT32-NEXT: CPU Version ID: 0x0
+# DEFAULT32-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# DEFAULT32-NEXT: StorageClass: C_FILE (0x67)
# DEFAULT32-NEXT: NumberOfAuxEntries: 1
# DEFAULT32-NEXT: File Auxiliary Entry {
@@ -213,7 +213,7 @@ Symbols:
# NON-DEFAULT32-NEXT: Value (SymbolTableIndex): 0x0
# NON-DEFAULT32-NEXT: Section: N_UNDEF
# NON-DEFAULT32-NEXT: Source Language ID: TB_C (0x0)
-# NON-DEFAULT32-NEXT: CPU Version ID: 0x0
+# NON-DEFAULT32-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# NON-DEFAULT32-NEXT: StorageClass: C_FILE (0x67)
# NON-DEFAULT32-NEXT: NumberOfAuxEntries: 1
# NON-DEFAULT32-NEXT: File Auxiliary Entry {
@@ -296,7 +296,7 @@ Symbols:
# DEFAULT64-NEXT: Value (SymbolTableIndex): 0x0
# DEFAULT64-NEXT: Section: N_UNDEF
# DEFAULT64-NEXT: Source Language ID: TB_C (0x0)
-# DEFAULT64-NEXT: CPU Version ID: 0x0
+# DEFAULT64-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# DEFAULT64-NEXT: StorageClass: C_FILE (0x67)
# DEFAULT64-NEXT: NumberOfAuxEntries: 1
# DEFAULT64-NEXT: File Auxiliary Entry {
@@ -426,7 +426,7 @@ Symbols:
# NON-DEFAULT64-NEXT: Value (SymbolTableIndex): 0x0
# NON-DEFAULT64-NEXT: Section: N_UNDEF
# NON-DEFAULT64-NEXT: Source Language ID: TB_C (0x0)
-# NON-DEFAULT64-NEXT: CPU Version ID: 0x0
+# NON-DEFAULT64-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# NON-DEFAULT64-NEXT: StorageClass: C_FILE (0x67)
# NON-DEFAULT64-NEXT: NumberOfAuxEntries: 1
# NON-DEFAULT64-NEXT: File Auxiliary Entry {
@@ -466,7 +466,7 @@ Symbols:
# FILENAME-NEXT: Value (SymbolTableIndex): 0x0
# FILENAME-NEXT: Section: N_UNDEF
# FILENAME-NEXT: Source Language ID: TB_C (0x0)
-# FILENAME-NEXT: CPU Version ID: 0x0
+# FILENAME-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# FILENAME-NEXT: StorageClass: C_FILE (0x67)
# FILENAME-NEXT: NumberOfAuxEntries: 1
# FILENAME-NEXT: File Auxiliary Entry {
@@ -554,7 +554,7 @@ Symbols:
# AUXNUM-NEXT: Value (SymbolTableIndex): 0x0
# AUXNUM-NEXT: Section: N_UNDEF
# AUXNUM-NEXT: Source Language ID: TB_C (0x0)
-# AUXNUM-NEXT: CPU Version ID: 0x0
+# AUXNUM-NEXT: CPU Version ID: TCPU_INVALID (0x0)
# AUXNUM-NEXT: StorageClass: C_FILE (0x67)
# AUXNUM-NEXT: NumberOfAuxEntries: 2
# AUXNUM-NEXT: File Auxiliary Entry {
diff --git a/llvm/tools/llvm-readobj/XCOFFDumper.cpp b/llvm/tools/llvm-readobj/XCOFFDumper.cpp
index 46b510cfb06a3f..6a099c08e1acad 100644
--- a/llvm/tools/llvm-readobj/XCOFFDumper.cpp
+++ b/llvm/tools/llvm-readobj/XCOFFDumper.cpp
@@ -723,7 +723,12 @@ const EnumEntry<XCOFF::CFileLangId> CFileLangIdClass[] = {
const EnumEntry<XCOFF::CFileCpuId> CFileCpuIdClass[] = {
#define ECase(X) \
{ #X, XCOFF::X }
- ECase(TCPU_PPC64), ECase(TCPU_COM), ECase(TCPU_970)
+ ECase(TCPU_INVALID), ECase(TCPU_PPC), ECase(TCPU_PPC64), ECase(TCPU_COM),
+ ECase(TCPU_PWR), ECase(TCPU_ANY), ECase(TCPU_601), ECase(TCPU_603),
+ ECase(TCPU_604), ECase(TCPU_620), ECase(TCPU_A35), ECase(TCPU_970),
+ ECase(TCPU_PWR5), ECase(TCPU_PWR6), ECase(TCPU_PWR5X), ECase(TCPU_PWR6E),
+ ECase(TCPU_PWR7), ECase(TCPU_PWR8), ECase(TCPU_PWR9), ECase(TCPU_PWR10),
+ ECase(TCPU_PWRX)
#undef ECase
};
>From b5dffed69289f0d6869f7b2f8ec03c6fc6c4e54f Mon Sep 17 00:00:00 2001
From: Amy Kwan <amy.kwan1 at ibm.com>
Date: Sun, 10 Nov 2024 22:46:43 -0600
Subject: [PATCH 2/5] Update patch to use PPCTargetXCOFFStreamer instead.
---
llvm/include/llvm/MC/MCObjectStreamer.h | 1 -
llvm/include/llvm/MC/MCStreamer.h | 3 ---
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 26 +++----------------
llvm/lib/MC/MCAsmStreamer.cpp | 9 -------
llvm/lib/MC/MCObjectStreamer.cpp | 4 ---
llvm/lib/MC/MCStreamer.cpp | 3 ---
.../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 9 +++++--
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 23 ++++++++++++++++
llvm/test/CodeGen/PowerPC/aix-cpu-version.ll | 2 +-
llvm/test/CodeGen/PowerPC/aix-filename-c.ll | 2 +-
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll | 3 ++-
llvm/test/DebugInfo/XCOFF/empty.ll | 4 +--
llvm/test/DebugInfo/XCOFF/explicit-section.ll | 2 +-
.../test/DebugInfo/XCOFF/function-sections.ll | 2 +-
14 files changed, 41 insertions(+), 52 deletions(-)
diff --git a/llvm/include/llvm/MC/MCObjectStreamer.h b/llvm/include/llvm/MC/MCObjectStreamer.h
index 0b0b3477d03273..aaa13be6b29868 100644
--- a/llvm/include/llvm/MC/MCObjectStreamer.h
+++ b/llvm/include/llvm/MC/MCObjectStreamer.h
@@ -185,7 +185,6 @@ class MCObjectStreamer : public MCStreamer {
void emitFileDirective(StringRef Filename) override;
void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) override;
- void emitMachineDirective(StringRef CPU) override;
void emitAddrsig() override;
void emitAddrsigSym(const MCSymbol *Sym) override;
diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h
index bf6b06d8c8431f..cfb31a76218425 100644
--- a/llvm/include/llvm/MC/MCStreamer.h
+++ b/llvm/include/llvm/MC/MCStreamer.h
@@ -873,9 +873,6 @@ class MCStreamer {
virtual void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description);
- // Emit '.machine "CPU"' assembler directive.
- virtual void emitMachineDirective(StringRef CPU);
-
/// Emit the "identifiers" directive. This implements the
/// '.ident "version foo"' assembler directive.
virtual void emitIdent(StringRef IdentString) {}
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 9a12953f54af6b..3072edc5088e2a 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -120,7 +120,6 @@
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
-#include "llvm/TargetParser/PPCTargetParser.h"
#include "llvm/TargetParser/Triple.h"
#include <algorithm>
#include <cassert>
@@ -527,28 +526,9 @@ bool AsmPrinter::doInitialization(Module &M) {
}
}
- if (Target.isOSBinFormatXCOFF()) {
- // Emit .machine directive on AIX.
- XCOFF::CFileCpuId TargetCpuId = XCOFF::TCPU_INVALID;
- // Walk through the "target-cpu" attribute of functions and use the newest
- // level as the CPU of the module.
- for (auto &F : M) {
- XCOFF::CFileCpuId FunCpuId =
- XCOFF::getCpuID(TM.getSubtargetImpl(F)->getCPU());
- if (FunCpuId > TargetCpuId)
- TargetCpuId = FunCpuId;
- }
- // If there is no "target-cpu" attribute in functions, take the "-mcpu"
- // value. If both are omitted, use getNormalizedPPCTargetCPU() to determine
- // the default CPU.
- if (!TargetCpuId)
- TargetCpuId = XCOFF::getCpuID(TM.getTargetCPU().empty()
- ? PPC::getNormalizedPPCTargetCPU(Target)
- : TM.getTargetCPU());
- OutStreamer->emitMachineDirective(XCOFF::getTCPUString(TargetCpuId));
-
- // On AIX, emit bytes for llvm.commandline metadata after .file so that the
- // C_INFO symbol is preserved if any csect is kept by the linker.
+ // On AIX, emit bytes for llvm.commandline metadata after .file so that the
+ // C_INFO symbol is preserved if any csect is kept by the linker.
+ if (TM.getTargetTriple().isOSBinFormatXCOFF()) {
emitModuleCommandLines(M);
// Now we can generate section information.
OutStreamer->initSections(false, *TM.getMCSubtargetInfo());
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index 9c7d9e68762a16..d48b384f21cbce 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -288,9 +288,6 @@ class MCAsmStreamer final : public MCStreamer {
void emitFileDirective(StringRef Filename) override;
void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) override;
-
- void emitMachineDirective(StringRef CPU) override;
-
Expected<unsigned> tryEmitDwarfFileDirective(
unsigned FileNo, StringRef Directory, StringRef Filename,
std::optional<MD5::MD5Result> Checksum = std::nullopt,
@@ -1633,12 +1630,6 @@ void MCAsmStreamer::emitFileDirective(StringRef Filename,
EmitEOL();
}
-void MCAsmStreamer::emitMachineDirective(StringRef CPU) {
- OS << "\t.machine\t";
- PrintQuotedString(CPU, OS);
- EmitEOL();
-}
-
void MCAsmStreamer::printDwarfFileDirective(
unsigned FileNo, StringRef Directory, StringRef Filename,
std::optional<MD5::MD5Result> Checksum, std::optional<StringRef> Source,
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index b13967d6860522..b2b21435fa4af4 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -804,10 +804,6 @@ void MCObjectStreamer::emitFileDirective(StringRef Filename,
// with the integrated assembler.
}
-void MCObjectStreamer::emitMachineDirective(StringRef CPU) {
- getAssembler().getWriter().setCPU(CPU);
-}
-
void MCObjectStreamer::emitAddrsig() {
getAssembler().getWriter().emitAddrsigSection();
}
diff --git a/llvm/lib/MC/MCStreamer.cpp b/llvm/lib/MC/MCStreamer.cpp
index c59170182fa67d..df1b160f9df28e 100644
--- a/llvm/lib/MC/MCStreamer.cpp
+++ b/llvm/lib/MC/MCStreamer.cpp
@@ -1208,9 +1208,6 @@ void MCStreamer::emitFileDirective(StringRef Filename,
StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) {
}
-void MCStreamer::emitMachineDirective(StringRef CPU) {
- llvm_unreachable("this directive only supported on XCOFF targets");
-}
void MCStreamer::emitCOFFSymbolStorageClass(int StorageClass) {
llvm_unreachable("this directive only supported on COFF targets");
}
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index c9fb76dff05093..cb2a9567175adc 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -258,7 +258,11 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
}
void emitMachine(StringRef CPU) override {
- OS << "\t.machine " << CPU << '\n';
+ const Triple &TT = Streamer.getContext().getTargetTriple();
+ if (TT.isOSBinFormatXCOFF())
+ OS << "\t.machine\t" << '\"' << CPU << '\"' << '\n';
+ else
+ OS << "\t.machine " << CPU << '\n';
}
void emitAbiVersion(int AbiVersion) override {
@@ -422,7 +426,8 @@ class PPCTargetXCOFFStreamer : public PPCTargetStreamer {
}
void emitMachine(StringRef CPU) override {
- llvm_unreachable("Machine pseudo-ops are invalid for XCOFF.");
+ MCXCOFFStreamer &XCOFFStreamer = static_cast<MCXCOFFStreamer &>(Streamer);
+ XCOFFStreamer.getAssembler().getWriter().setCPU(CPU);
}
void emitAbiVersion(int AbiVersion) override {
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 244328d9cd53f6..c6f9036e2d45ba 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -72,6 +72,7 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/TargetParser/Triple.h"
+#include "llvm/TargetParser/PPCTargetParser.h"
#include "llvm/Transforms/Utils/ModuleUtils.h"
#include <cassert>
#include <cstdint>
@@ -3046,6 +3047,28 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
bool PPCAIXAsmPrinter::doInitialization(Module &M) {
const bool Result = PPCAsmPrinter::doInitialization(M);
+ // Emit .machine directive on AIX.
+ const Triple &Target = TM.getTargetTriple();
+ XCOFF::CFileCpuId TargetCpuId = XCOFF::TCPU_INVALID;
+ // Walk through the "target-cpu" attribute of functions and use the newest
+ // level as the CPU of the module.
+ for (auto &F : M) {
+ XCOFF::CFileCpuId FunCpuId =
+ XCOFF::getCpuID(TM.getSubtargetImpl(F)->getCPU());
+ if (FunCpuId > TargetCpuId)
+ TargetCpuId = FunCpuId;
+ }
+ // If there is no "target-cpu" attribute within the functions, take the
+ // "-mcpu" value. If both are omitted, use getNormalizedPPCTargetCPU() to
+ // determine the default CPU.
+ if (!TargetCpuId)
+ TargetCpuId = XCOFF::getCpuID(TM.getTargetCPU().empty()
+ ? PPC::getNormalizedPPCTargetCPU(Target)
+ : TM.getTargetCPU());
+ PPCTargetStreamer *TS =
+ static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
+ TS->emitMachine(XCOFF::getTCPUString(TargetCpuId));
+
auto setCsectAlignment = [this](const GlobalObject *GO) {
// Declarations have 0 alignment which is set by default.
if (GO->isDeclarationForLinker())
diff --git a/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll b/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll
index f9ef6c642b0c1f..630a09cc58dc66 100644
--- a/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-cpu-version.ll
@@ -1,9 +1,9 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
; CHECK: .file "1.c"
-; CHECK-NEXT: .machine "PWR8"
; CHECK-NEXT: .csect ..text..[PR],5
; CHECK-NEXT: .rename ..text..[PR],""
+; CHECK-NEXT: .machine "PWR8"
source_filename = "1.c"
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
index 2c6d1941fa992e..1fec0665c4ca80 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
@@ -8,9 +8,9 @@
source_filename = "1.c"
; ASM: .file "1.c",,"LLVM{{.*}}"
-; ASM-NEXT: .machine "PWR9"
; ASM-NEXT: .csect ..text..[PR],5
; ASM-NEXT: .rename ..text..[PR],""
+; ASM-NEXT: .machine "PWR9"
; OBJ32: Symbol {
; OBJ32-NEXT: Index: 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index f9f72f8d3507d3..10b04b570fa32a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -46,8 +46,9 @@
; CHECK-NOT: .toc
; CHECK: .file
-; CHECK-NEXT: .machine "PWR7"
; CHECK-NEXT: .csect ..text..[PR],5
+; CHECK-NEXT: .rename ..text..[PR],""
+; CHECK-NEXT: .machine "PWR7"
; CHECK: .csect .data[RW],5
; CHECK-NEXT: .globl ivar
diff --git a/llvm/test/DebugInfo/XCOFF/empty.ll b/llvm/test/DebugInfo/XCOFF/empty.ll
index c18bc559d31153..af2f74fb82b8f5 100644
--- a/llvm/test/DebugInfo/XCOFF/empty.ll
+++ b/llvm/test/DebugInfo/XCOFF/empty.ll
@@ -35,9 +35,9 @@ entry:
!12 = !DILocation(line: 3, column: 3, scope: !8)
; ASM32: .file "1.c"
-; ASM32-NEXT: .machine "PWR7"
; ASM32-NEXT: .csect ..text..[PR],5
; ASM32-NEXT: .rename ..text..[PR],""
+; ASM32-NEXT: .machine "COM"
; ASM32-NEXT: .globl main[DS] # -- Begin function main
; ASM32-NEXT: .globl .main
; ASM32-NEXT: .align 2
@@ -238,9 +238,9 @@ entry:
; ASM32-NEXT: L..debug_line_end0:
; ASM64: .file "1.c"
-; ASM64-NEXT: .machine "PWR7"
; ASM64-NEXT: .csect ..text..[PR],5
; ASM64-NEXT: .rename ..text..[PR],""
+; ASM64-NEXT: .machine "COM"
; ASM64-NEXT: .globl main[DS] # -- Begin function main
; ASM64-NEXT: .globl .main
; ASM64-NEXT: .align 2
diff --git a/llvm/test/DebugInfo/XCOFF/explicit-section.ll b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
index 3aefb0455b6b9a..0ae9289c08df3e 100644
--- a/llvm/test/DebugInfo/XCOFF/explicit-section.ll
+++ b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
@@ -43,9 +43,9 @@ entry:
!16 = !DILocation(line: 3, column: 3, scope: !14)
; CHECK: .file "2.c"
-; CHECK-NEXT: .machine "PWR7"
; CHECK-NEXT: .csect ..text..[PR],5
; CHECK-NEXT: .rename ..text..[PR],""
+; CHECK-NEXT: .machine "COM"
; CHECK-NEXT: .globl bar[DS] # -- Begin function bar
; CHECK-NEXT: .globl .bar
; CHECK-NEXT: .align 2
diff --git a/llvm/test/DebugInfo/XCOFF/function-sections.ll b/llvm/test/DebugInfo/XCOFF/function-sections.ll
index 07362e19f72996..6a86ae6796fbc3 100644
--- a/llvm/test/DebugInfo/XCOFF/function-sections.ll
+++ b/llvm/test/DebugInfo/XCOFF/function-sections.ll
@@ -38,9 +38,9 @@ entry:
!14 = !DILocation(line: 8, column: 3, scope: !13)
; CHECK: .file "1.c"
-; CHECK-NEXT: .machine "PWR7"
; CHECK-NEXT: .csect ..text..[PR],5
; CHECK-NEXT: .rename ..text..[PR],""
+; CHECK-NEXT: .machine "COM"
; CHECK-NEXT: .csect .foo[PR],5
; CHECK-NEXT: .globl foo[DS] # -- Begin function foo
; CHECK-NEXT: .globl .foo[PR]
>From cd8e424e4c202eeabc760690e9674ff94c75935f Mon Sep 17 00:00:00 2001
From: Amy Kwan <amy.kwan1 at ibm.com>
Date: Sun, 10 Nov 2024 22:51:00 -0600
Subject: [PATCH 3/5] Fix clang format
---
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index c6f9036e2d45ba..be487bbe3a3bd6 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -71,8 +71,8 @@
#include "llvm/Support/Threading.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/TargetParser/Triple.h"
#include "llvm/TargetParser/PPCTargetParser.h"
+#include "llvm/TargetParser/Triple.h"
#include "llvm/Transforms/Utils/ModuleUtils.h"
#include <cassert>
#include <cstdint>
>From 06119fa73a7a5917e2a640526521c745550405e6 Mon Sep 17 00:00:00 2001
From: Amy Kwan <amy.kwan1 at ibm.com>
Date: Mon, 11 Nov 2024 08:09:43 -0600
Subject: [PATCH 4/5] Fix comment and pull out code into variable.
---
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index be487bbe3a3bd6..073857e4c2dc0c 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -3047,7 +3047,7 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
bool PPCAIXAsmPrinter::doInitialization(Module &M) {
const bool Result = PPCAsmPrinter::doInitialization(M);
- // Emit .machine directive on AIX.
+ // Emit the .machine directive on AIX.
const Triple &Target = TM.getTargetTriple();
XCOFF::CFileCpuId TargetCpuId = XCOFF::TCPU_INVALID;
// Walk through the "target-cpu" attribute of functions and use the newest
@@ -3061,10 +3061,12 @@ bool PPCAIXAsmPrinter::doInitialization(Module &M) {
// If there is no "target-cpu" attribute within the functions, take the
// "-mcpu" value. If both are omitted, use getNormalizedPPCTargetCPU() to
// determine the default CPU.
- if (!TargetCpuId)
- TargetCpuId = XCOFF::getCpuID(TM.getTargetCPU().empty()
- ? PPC::getNormalizedPPCTargetCPU(Target)
- : TM.getTargetCPU());
+ if (!TargetCpuId) {
+ StringRef TargetCPU = TM.getTargetCPU();
+ TargetCpuId = XCOFF::getCpuID(
+ TargetCPU.empty() ? PPC::getNormalizedPPCTargetCPU(Target) : TargetCPU);
+ }
+
PPCTargetStreamer *TS =
static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
TS->emitMachine(XCOFF::getTCPUString(TargetCpuId));
>From 7e696cf66299c4fc9e36858a8a155ec52056b3a2 Mon Sep 17 00:00:00 2001
From: Amy Kwan <amy.kwan1 at ibm.com>
Date: Wed, 4 Dec 2024 22:40:23 -0600
Subject: [PATCH 5/5] Fix static_cast, move AIX specific code into
XCOFFObjectWriter
---
llvm/include/llvm/MC/MCAssembler.h | 1 -
llvm/include/llvm/MC/MCObjectWriter.h | 3 ---
llvm/include/llvm/MC/MCXCOFFObjectWriter.h | 5 +++++
llvm/lib/MC/XCOFFObjectWriter.cpp | 2 +-
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 5 +++--
5 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h
index e9ed64f36e3a0d..29bfc48374f851 100644
--- a/llvm/include/llvm/MC/MCAssembler.h
+++ b/llvm/include/llvm/MC/MCAssembler.h
@@ -229,7 +229,6 @@ class MCAssembler {
}
void setCPU(std::string TargetCPU) { CPU = std::move(TargetCPU); }
- StringRef getCPU() const { return CPU; }
bool registerSection(MCSection &Section);
bool registerSymbol(const MCSymbol &Symbol);
diff --git a/llvm/include/llvm/MC/MCObjectWriter.h b/llvm/include/llvm/MC/MCObjectWriter.h
index 2306483dc9e8e3..81ba6ffd5d44e4 100644
--- a/llvm/include/llvm/MC/MCObjectWriter.h
+++ b/llvm/include/llvm/MC/MCObjectWriter.h
@@ -36,8 +36,6 @@ class MCObjectWriter {
SmallVector<std::pair<std::string, size_t>, 0> FileNames;
// XCOFF specific: Optional compiler version.
std::string CompilerVersion;
- // AIX specific: CPU type.
- std::string CPUType;
std::vector<const MCSymbol *> AddrsigSyms;
bool EmitAddrsigSection = false;
bool SubsectionsViaSymbols = false;
@@ -102,7 +100,6 @@ class MCObjectWriter {
void setCompilerVersion(StringRef CompilerVers) {
CompilerVersion = CompilerVers;
}
- void setCPU(StringRef TargetCPU) { CPUType = TargetCPU; }
/// Tell the object writer to emit an address-significance table during
/// writeObject(). If this function is not called, all symbols are treated as
diff --git a/llvm/include/llvm/MC/MCXCOFFObjectWriter.h b/llvm/include/llvm/MC/MCXCOFFObjectWriter.h
index 968d938a654981..04172286ca7703 100644
--- a/llvm/include/llvm/MC/MCXCOFFObjectWriter.h
+++ b/llvm/include/llvm/MC/MCXCOFFObjectWriter.h
@@ -40,11 +40,16 @@ class MCXCOFFObjectTargetWriter : public MCObjectTargetWriter {
};
class XCOFFObjectWriter : public MCObjectWriter {
+ // AIX specific CPU type.
+ std::string CPUType;
+
public:
virtual void addExceptionEntry(const MCSymbol *Symbol, const MCSymbol *Trap,
unsigned LanguageCode, unsigned ReasonCode,
unsigned FunctionSize, bool hasDebug) = 0;
virtual void addCInfoSymEntry(StringRef Name, StringRef Metadata) = 0;
+ StringRef getCPUType() const { return CPUType; }
+ void setCPU(StringRef TargetCPU) { CPUType = TargetCPU; }
};
std::unique_ptr<MCObjectWriter>
diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp
index 7f8e1425b6db3c..04ea8fa3511a7e 100644
--- a/llvm/lib/MC/XCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/XCOFFObjectWriter.cpp
@@ -1181,7 +1181,7 @@ void XCOFFWriter::writeSymbolTable(MCAssembler &Asm) {
else
LangID = XCOFF::TB_CPLUSPLUS;
- uint8_t CpuID = XCOFF::getCpuID(CPUType);
+ uint8_t CpuID = XCOFF::getCpuID(getCPUType());
int NumberOfFileAuxEntries = 1;
if (!Vers.empty())
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index cb2a9567175adc..61be6abaacd2f4 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -37,6 +37,7 @@
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCSymbolELF.h"
#include "llvm/MC/MCSymbolXCOFF.h"
+#include "llvm/MC/MCXCOFFObjectWriter.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
@@ -426,8 +427,8 @@ class PPCTargetXCOFFStreamer : public PPCTargetStreamer {
}
void emitMachine(StringRef CPU) override {
- MCXCOFFStreamer &XCOFFStreamer = static_cast<MCXCOFFStreamer &>(Streamer);
- XCOFFStreamer.getAssembler().getWriter().setCPU(CPU);
+ static_cast<XCOFFObjectWriter &>(Streamer.getAssemblerPtr()->getWriter())
+ .setCPU(CPU);
}
void emitAbiVersion(int AbiVersion) override {
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