[llvm] [hexagon] Add support for llvm.debugtrap (PR #117049)
LLVM Continuous Integration via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 4 10:18:22 PST 2024
llvm-ci wrote:
LLVM Buildbot has detected a new failure on builder `flang-aarch64-out-of-tree` running on `linaro-flang-aarch64-out-of-tree` while building `llvm` at step 8 "test-build-flang-unified-tree-check-flang".
Full details are available at: https://lab.llvm.org/buildbot/#/builders/53/builds/8954
<details>
<summary>Here is the relevant piece of the build log for the reference</summary>
```
Step 8 (test-build-flang-unified-tree-check-flang) failure: test (failure)
******************** TEST 'Flang :: Fir/CUDA/cuda-target-rewrite.mlir' FAILED ********************
Exit Code: 1
Command Output (stderr):
--
RUN: at line 1: fir-opt --target-rewrite /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/llvm-project/flang/test/Fir/CUDA/cuda-target-rewrite.mlir | /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/build_llvm/bin/FileCheck /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/llvm-project/flang/test/Fir/CUDA/cuda-target-rewrite.mlir
+ fir-opt --target-rewrite /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/llvm-project/flang/test/Fir/CUDA/cuda-target-rewrite.mlir
+ /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/build_llvm/bin/FileCheck /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/llvm-project/flang/test/Fir/CUDA/cuda-target-rewrite.mlir
/home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/llvm-project/flang/test/Fir/CUDA/cuda-target-rewrite.mlir:15:11: error: CHECK: expected string not found in input
// CHECK: %{{.*}} = fir.call @_FortranAzpowk(%{{.*}}, %{{.*}}, %{{.*}}) : (f64, f64, i64) -> tuple<f64, f64>
^
<stdin>:3:22: note: scanning from here
gpu.func @_QPvcpowdk(%arg0: !fir.ref<complex<f64>> {cuf.data_attr = #cuf.cuda<device>, fir.bindc_name = "a"}) attributes {cuf.proc_attr = #cuf.cuda_proc<global>} {
^
<stdin>:12:2: note: possible intended match here
%7 = fir.call @_FortranAzpowk(%6, %1) : (!fir.array<2xf64>, i64) -> tuple<f64, f64>
^
Input file: <stdin>
Check file: /home/tcwg-buildbot/worker/flang-aarch64-out-of-tree/llvm-project/flang/test/Fir/CUDA/cuda-target-rewrite.mlir
-dump-input=help explains the following input dump.
Input was:
<<<<<<
1: module attributes {dlti.dl_spec = #dlti.dl_spec<i64 = dense<[32, 64]> : vector<2xi64>, f128 = dense<128> : vector<2xi64>, f64 = dense<64> : vector<2xi64>, f16 = dense<16> : vector<2xi64>, i32 = dense<32> : vector<2xi64>, i16 = dense<16> : vector<2xi64>, i1 = dense<8> : vector<2xi64>, i8 = dense<8> : vector<2xi64>, !llvm.ptr = dense<64> : vector<4xi64>, "dlti.endianness" = "little">, llvm.data_layout = ""} {
2: gpu.module @testmod {
3: gpu.func @_QPvcpowdk(%arg0: !fir.ref<complex<f64>> {cuf.data_attr = #cuf.cuda<device>, fir.bindc_name = "a"}) attributes {cuf.proc_attr = #cuf.cuda_proc<global>} {
check:15'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
4: %0 = fir.alloca i64
check:15'0 ~~~~~~~~~~~~~~~~~~~~~
5: %1 = fir.load %0 : !fir.ref<i64>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
6: %2 = fir.load %arg0 : !fir.ref<complex<f64>>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7: %3 = llvm.intr.stacksave : !llvm.ptr
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8: %4 = fir.alloca !fir.array<2xf64>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9: %5 = fir.convert %4 : (!fir.ref<!fir.array<2xf64>>) -> !fir.ref<complex<f64>>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10: fir.store %2 to %5 : !fir.ref<complex<f64>>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11: %6 = fir.load %4 : !fir.ref<!fir.array<2xf64>>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12: %7 = fir.call @_FortranAzpowk(%6, %1) : (!fir.array<2xf64>, i64) -> tuple<f64, f64>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:15'1 ? possible intended match
13: %8 = fir.alloca tuple<f64, f64>
check:15'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
...
```
</details>
https://github.com/llvm/llvm-project/pull/117049
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