[llvm] 2202f0e - [SLP][X86] Add test coverage for #111126
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 4 02:05:08 PST 2024
Author: Simon Pilgrim
Date: 2024-12-04T10:03:43Z
New Revision: 2202f0e093d84081ff098c6720bc8e2302a56061
URL: https://github.com/llvm/llvm-project/commit/2202f0e093d84081ff098c6720bc8e2302a56061
DIFF: https://github.com/llvm/llvm-project/commit/2202f0e093d84081ff098c6720bc8e2302a56061.diff
LOG: [SLP][X86] Add test coverage for #111126
This needs to be expanded to a wider range of tests but for now just focus on #111126
Added:
llvm/test/Transforms/SLPVectorizer/X86/store-constant.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/store-constant.ll b/llvm/test/Transforms/SLPVectorizer/X86/store-constant.ll
new file mode 100644
index 00000000000000..41c3561dd73789
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/store-constant.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+
+ at arr = global [20 x i64] zeroinitializer, align 16
+
+define void @PR111126() {
+; SSE-LABEL: @PR111126(
+; SSE-NEXT: store i64 1, ptr @arr, align 16
+; SSE-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 8), align 8
+; SSE-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 16), align 16
+; SSE-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 24), align 8
+; SSE-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 32), align 16
+; SSE-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 40), align 8
+; SSE-NEXT: ret void
+;
+; AVX-LABEL: @PR111126(
+; AVX-NEXT: store <4 x i64> splat (i64 1), ptr @arr, align 16
+; AVX-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 32), align 16
+; AVX-NEXT: store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 40), align 8
+; AVX-NEXT: ret void
+;
+ store i64 1, ptr @arr, align 16
+ store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 8), align 8
+ store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 16), align 16
+ store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 24), align 8
+ store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 32), align 16
+ store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 40), align 8
+ ret void
+}
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