[llvm] [RISCV] Match deinterleave(4,8) shuffles to SHL/TRUNC when legal (PR #118509)

[Craig Topper via llvm-commits]

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@@ -19,18 +19,19 @@ define {<16 x i1>, <16 x i1>} @vector_deinterleave_v16i1_v32i1(<32 x i1> %vec) {
 ; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma
 ; CHECK-NEXT:    vmv.s.x v9, a0
 ; CHECK-NEXT:    vmv1r.v v0, v8
-; CHECK-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
-; CHECK-NEXT:    vmerge.vim v14, v10, 1, v0
-; CHECK-NEXT:    vadd.vi v8, v12, -16
+; CHECK-NEXT:    vsetvli zero, zero, e8, m1, ta, ma
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topperc wrote:

This whole sequence is more complicated than it probably needs to be. Looks like the promotion to an i8 vector interferes with the matching of a deinterleave with 2 extract_subvector inputs because the zero_extend is between the extracts and the shuffle.

https://github.com/llvm/llvm-project/pull/118509