[llvm] [RISCV] Match deinterleave(4,8) shuffles to SHL/TRUNC when legal (PR #118509)

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git-clang-format --diff 877b934831d491e4388b82794cded417b1b11862 743d25b04e42c50c50799629c3caff1edeb26866 --extensions cpp -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 22f994c60c..24f761933c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -4477,7 +4477,6 @@ static SDValue getSingleShuffleSrc(MVT VT, MVT ContainerVT, SDValue V1,
   return Src;
 }
 
-
 /// Is this shuffle interleaving contiguous elements from one vector into the
 /// even elements and contiguous elements from another vector into the odd
 /// elements. \p EvenSrc will contain the element that should be in the first
@@ -4594,9 +4593,9 @@ static int isElementRotate(int &LoSrc, int &HiSrc, ArrayRef<int> Mask) {
 // element type must be a legal element type.
 // [a, p, b, q, c, r, d, s] -> [a, b, c, d] (Factor=2, Index=0)
 //                          -> [p, q, r, s] (Factor=2, Index=1)
-static SDValue getDeinterleaveShiftAndTrunc(const SDLoc &DL, MVT VT, SDValue Src,
-                                            unsigned Factor, unsigned Index,
-                                            SelectionDAG &DAG) {
+static SDValue getDeinterleaveShiftAndTrunc(const SDLoc &DL, MVT VT,
+                                            SDValue Src, unsigned Factor,
+                                            unsigned Index, SelectionDAG &DAG) {
   unsigned EltBits = VT.getScalarSizeInBits();
   ElementCount SrcEC = Src.getValueType().getVectorElementCount();
   MVT WideSrcVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits * Factor),
@@ -4610,8 +4609,8 @@ static SDValue getDeinterleaveShiftAndTrunc(const SDLoc &DL, MVT VT, SDValue Src
                             DAG.getConstant(Shift, DL, WideSrcVT));
   Res = DAG.getNode(ISD::TRUNCATE, DL, ResVT, Res);
   MVT IntVT = VT.changeVectorElementTypeToInteger();
-  Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, IntVT, DAG.getUNDEF(IntVT),
-                    Res, DAG.getVectorIdxConstant(0, DL));
+  Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, IntVT, DAG.getUNDEF(IntVT), Res,
+                    DAG.getVectorIdxConstant(0, DL));
   return DAG.getBitcast(VT, Res);
 }
 
@@ -5302,8 +5301,8 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
   if (ShuffleVectorInst::isReverseMask(Mask, NumElts) && V2.isUndef())
     return DAG.getNode(ISD::VECTOR_REVERSE, DL, VT, V1);
 
-  // If this is a deinterleave(2,4,8) and we can widen the vector, then we can use
-  // shift and truncate to perform the shuffle.
+  // If this is a deinterleave(2,4,8) and we can widen the vector, then we can
+  // use shift and truncate to perform the shuffle.
   // TODO: For Factor=6, we can perform the first step of the deinterleave via
   // shift-and-trunc reducing total cost for everything except an mf8 result.
   // TODO: For Factor=4,8, we can do the same when the ratio isn't high enough
@@ -5318,8 +5317,9 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
         if (SDValue Src = getSingleShuffleSrc(VT, ContainerVT, V1, V2)) {
           if (Src.getValueType() == VT) {
             EVT WideVT = VT.getDoubleNumVectorElementsVT();
-            Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, DAG.getUNDEF(WideVT),
-                              Src, DAG.getVectorIdxConstant(0, DL));
+            Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideVT,
+                              DAG.getUNDEF(WideVT), Src,
+                              DAG.getVectorIdxConstant(0, DL));
           }
           return getDeinterleaveShiftAndTrunc(DL, VT, Src, Factor, Index, DAG);
         }
@@ -5327,7 +5327,6 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
     }
   }
 
-
   if (SDValue V =
           lowerVECTOR_SHUFFLEAsVSlideup(DL, VT, V1, V2, Mask, Subtarget, DAG))
     return V;

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https://github.com/llvm/llvm-project/pull/118509