[llvm] [SPIR-V] Add definitions and fix implementation for atomic builtins (PR #106107)
Michal Paszkowski via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 3 07:22:03 PST 2024
https://github.com/michalpaszkowski updated https://github.com/llvm/llvm-project/pull/106107
>From a1f5c192a07cb2689e909705da95968ef4e2ef7d Mon Sep 17 00:00:00 2001
From: Michal Paszkowski <michal at paszkowski.org>
Date: Mon, 26 Aug 2024 10:14:40 -0700
Subject: [PATCH 1/2] [SPIR-V] Add defs and fix impl for atomic builtins
This change adds the missing definitions for atom_{dec, inc, max, min,
xchg} builtins and relevant tests.
Please note that OpenCL 1.2 does not differentiate between signed and
unsigned atomic_min/atomic_max.
---
llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp | 22 ++++++++++++-------
llvm/lib/Target/SPIRV/SPIRVBuiltins.td | 10 +++++++++
.../CodeGen/SPIRV/transcoding/atomic_dec.ll | 16 ++++++++++++++
.../CodeGen/SPIRV/transcoding/atomic_inc.ll | 16 ++++++++++++++
.../CodeGen/SPIRV/transcoding/atomic_max.ll | 17 ++++++++++++++
.../CodeGen/SPIRV/transcoding/atomic_min.ll | 17 ++++++++++++++
.../CodeGen/SPIRV/transcoding/atomic_xchg.ll | 17 ++++++++++++++
7 files changed, 107 insertions(+), 8 deletions(-)
create mode 100644 llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll
create mode 100644 llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll
create mode 100644 llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll
create mode 100644 llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll
create mode 100644 llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index 66cf163a1a0ac2..521d015dd1924f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -784,7 +784,8 @@ static bool buildAtomicRMWInst(const SPIRV::IncomingCall *Call, unsigned Opcode,
Call->Arguments.size() >= 3 ? Call->Arguments[2] : Register();
MemSemanticsReg = buildMemSemanticsReg(MemSemanticsReg, PtrRegister,
Semantics, MIRBuilder, GR);
- Register ValueReg = Call->Arguments[1];
+ Register ValueReg =
+ Call->Arguments.size() >= 2 ? Call->Arguments[1] : Register();
Register ValueTypeReg = GR->getSPIRVTypeID(Call->ReturnType);
// support cl_ext_float_atomics
if (Call->ReturnType->getOpcode() == SPIRV::OpTypeFloat) {
@@ -807,13 +808,14 @@ static bool buildAtomicRMWInst(const SPIRV::IncomingCall *Call, unsigned Opcode,
ValueReg = NegValueReg;
}
}
- MIRBuilder.buildInstr(Opcode)
- .addDef(Call->ReturnRegister)
- .addUse(ValueTypeReg)
- .addUse(PtrRegister)
- .addUse(ScopeRegister)
- .addUse(MemSemanticsReg)
- .addUse(ValueReg);
+ auto MIB = MIRBuilder.buildInstr(Opcode)
+ .addDef(Call->ReturnRegister)
+ .addUse(ValueTypeReg)
+ .addUse(PtrRegister)
+ .addUse(ScopeRegister)
+ .addUse(MemSemanticsReg);
+ if (ValueReg)
+ MIB.addUse(ValueReg);
return true;
}
@@ -1458,6 +1460,10 @@ static bool generateAtomicInst(const SPIRV::IncomingCall *Call,
case SPIRV::OpAtomicXor:
case SPIRV::OpAtomicAnd:
case SPIRV::OpAtomicExchange:
+ case SPIRV::OpAtomicUMin:
+ case SPIRV::OpAtomicUMax:
+ case SPIRV::OpAtomicIIncrement:
+ case SPIRV::OpAtomicIDecrement:
return buildAtomicRMWInst(Call, Opcode, MIRBuilder, GR);
case SPIRV::OpMemoryBarrier:
return buildBarrierInst(Call, SPIRV::OpMemoryBarrier, MIRBuilder, GR);
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
index 5c057a79afa0c3..bffbe511598a7a 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
@@ -596,6 +596,8 @@ defm : DemangledNativeBuiltin<"__spirv_AtomicXor", OpenCL_std, Atomic, 4, 4, OpA
defm : DemangledNativeBuiltin<"atom_and", OpenCL_std, Atomic, 2, 4, OpAtomicAnd>;
defm : DemangledNativeBuiltin<"atomic_and", OpenCL_std, Atomic, 2, 4, OpAtomicAnd>;
defm : DemangledNativeBuiltin<"__spirv_AtomicAnd", OpenCL_std, Atomic, 4, 4, OpAtomicAnd>;
+defm : DemangledNativeBuiltin<"atom_xchg", OpenCL_std, Atomic, 2, 2, OpAtomicExchange>;
+defm : DemangledNativeBuiltin<"atomic_xchg", OpenCL_std, Atomic, 2, 2, OpAtomicExchange>;
defm : DemangledNativeBuiltin<"atomic_exchange", OpenCL_std, Atomic, 2, 4, OpAtomicExchange>;
defm : DemangledNativeBuiltin<"atomic_exchange_explicit", OpenCL_std, Atomic, 2, 4, OpAtomicExchange>;
defm : DemangledNativeBuiltin<"AtomicEx__spirv_change", OpenCL_std, Atomic, 2, 4, OpAtomicExchange>;
@@ -620,8 +622,16 @@ defm : DemangledNativeBuiltin<"__spirv_AtomicFlagClear", OpenCL_std, Atomic, 3,
defm : DemangledNativeBuiltin<"atomic_flag_clear_explicit", OpenCL_std, Atomic, 2, 3, OpAtomicFlagClear>;
defm : DemangledNativeBuiltin<"__spirv_AtomicSMin", OpenCL_std, Atomic, 4, 4, OpAtomicSMin>;
defm : DemangledNativeBuiltin<"__spirv_AtomicSMax", OpenCL_std, Atomic, 4, 4, OpAtomicSMax>;
+defm : DemangledNativeBuiltin<"atom_min", OpenCL_std, Atomic, 2, 2, OpAtomicUMin>;
+defm : DemangledNativeBuiltin<"atomic_min", OpenCL_std, Atomic, 2, 2, OpAtomicUMin>;
defm : DemangledNativeBuiltin<"__spirv_AtomicUMin", OpenCL_std, Atomic, 4, 4, OpAtomicUMin>;
+defm : DemangledNativeBuiltin<"atom_max", OpenCL_std, Atomic, 2, 2, OpAtomicUMax>;
+defm : DemangledNativeBuiltin<"atomic_max", OpenCL_std, Atomic, 2, 2, OpAtomicUMax>;
defm : DemangledNativeBuiltin<"__spirv_AtomicUMax", OpenCL_std, Atomic, 4, 4, OpAtomicUMax>;
+defm : DemangledNativeBuiltin<"atom_inc", OpenCL_std, Atomic, 1, 1, OpAtomicIIncrement>;
+defm : DemangledNativeBuiltin<"atomic_inc", OpenCL_std, Atomic, 1, 1, OpAtomicIIncrement>;
+defm : DemangledNativeBuiltin<"atom_dec", OpenCL_std, Atomic, 1, 1, OpAtomicIDecrement>;
+defm : DemangledNativeBuiltin<"atomic_dec", OpenCL_std, Atomic, 1, 1, OpAtomicIDecrement>;
// Barrier builtin records:
defm : DemangledNativeBuiltin<"barrier", OpenCL_std, Barrier, 1, 3, OpControlBarrier>;
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll
new file mode 100644
index 00000000000000..b7625d43e3f85d
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll
@@ -0,0 +1,16 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
+; CHECK-DAG: %[[#LONG:]] = OpTypeInt 64 0
+; CHECK-DAG: %[[#PTR:]] = OpTypePointer CrossWorkgroup %[[#LONG]]
+; CHECK-DAG: %[[#PARAM:]] = OpFunctionParameter %[[#PTR]]
+; CHECK-DAG: %[[#CONST0:]] = OpConstant %[[#INT]] 0
+; CHECK-DAG: %[[#CONST2:]] = OpConstant %[[#INT]] 2
+; CHECK: %[[#]] = OpAtomicIDecrement %[[#LONG]] %[[#PARAM]] %[[#CONST2]] %[[#CONST0]]
+define void @test_atomic_dec(ptr addrspace(1) %p, i64 %val) {
+ %call1 = call i64 @_Z8atom_decPU3AS3Vl(ptr addrspace(1) %p)
+ ret void
+}
+
+declare i64 @_Z8atom_decPU3AS3Vl(ptr addrspace(1))
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll
new file mode 100644
index 00000000000000..47622fe9ec0af7
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll
@@ -0,0 +1,16 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
+; CHECK-DAG: %[[#LONG:]] = OpTypeInt 64 0
+; CHECK-DAG: %[[#PTR:]] = OpTypePointer CrossWorkgroup %[[#LONG]]
+; CHECK-DAG: %[[#PARAM:]] = OpFunctionParameter %[[#PTR]]
+; CHECK-DAG: %[[#CONST0:]] = OpConstant %[[#INT]] 0
+; CHECK-DAG: %[[#CONST2:]] = OpConstant %[[#INT]] 2
+; CHECK: %[[#]] = OpAtomicIIncrement %[[#LONG]] %[[#PARAM]] %[[#CONST2]] %[[#CONST0]]
+define void @test_atomic_inc(ptr addrspace(1) %p, i64 %val) {
+ %call1 = call i64 @_Z8atom_incPU3AS3Vl(ptr addrspace(1) %p)
+ ret void
+}
+
+declare i64 @_Z8atom_incPU3AS3Vl(ptr addrspace(1))
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll
new file mode 100644
index 00000000000000..a7f29c613770e9
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll
@@ -0,0 +1,17 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
+; CHECK-DAG: %[[#LONG:]] = OpTypeInt 64 0
+; CHECK-DAG: %[[#PTR:]] = OpTypePointer CrossWorkgroup %[[#LONG]]
+; CHECK-DAG: %[[#PARAM:]] = OpFunctionParameter %[[#PTR]]
+; CHECK-DAG: %[[#VALUE:]] = OpFunctionParameter %[[#LONG]]
+; CHECK-DAG: %[[#CONST0:]] = OpConstant %[[#INT]] 0
+; CHECK-DAG: %[[#CONST2:]] = OpConstant %[[#INT]] 2
+; CHECK: %[[#]] = OpAtomicUMax %[[#LONG]] %[[#PARAM]] %[[#CONST2]] %[[#CONST0]] %[[#VALUE]]
+define void @test_atomic_max(ptr addrspace(1) %p, i64 %val) {
+ %call1 = call i64 @_Z8atom_maxPU3AS3Vmm(ptr addrspace(1) %p, i64 %val)
+ ret void
+}
+
+declare i64 @_Z8atom_maxPU3AS3Vmm(ptr addrspace(1), i64)
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll
new file mode 100644
index 00000000000000..d07147f51fb81d
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll
@@ -0,0 +1,17 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
+; CHECK-DAG: %[[#LONG:]] = OpTypeInt 64 0
+; CHECK-DAG: %[[#PTR:]] = OpTypePointer CrossWorkgroup %[[#LONG]]
+; CHECK-DAG: %[[#PARAM:]] = OpFunctionParameter %[[#PTR]]
+; CHECK-DAG: %[[#VALUE:]] = OpFunctionParameter %[[#LONG]]
+; CHECK-DAG: %[[#CONST0:]] = OpConstant %[[#INT]] 0
+; CHECK-DAG: %[[#CONST2:]] = OpConstant %[[#INT]] 2
+; CHECK: %[[#]] = OpAtomicUMin %[[#LONG]] %[[#PARAM]] %[[#CONST2]] %[[#CONST0]] %[[#VALUE]]
+define void @test_atomic_min(ptr addrspace(1) %p, i64 %val) {
+ %call1 = call i64 @_Z8atom_minPU3AS3Vmm(ptr addrspace(1) %p, i64 %val)
+ ret void
+}
+
+declare i64 @_Z8atom_minPU3AS3Vmm(ptr addrspace(1), i64)
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll
new file mode 100644
index 00000000000000..5ccf8eaa136bda
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll
@@ -0,0 +1,17 @@
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
+; CHECK-DAG: %[[#LONG:]] = OpTypeInt 64 0
+; CHECK-DAG: %[[#PTR:]] = OpTypePointer CrossWorkgroup %[[#LONG]]
+; CHECK-DAG: %[[#PARAM:]] = OpFunctionParameter %[[#PTR]]
+; CHECK-DAG: %[[#VALUE:]] = OpFunctionParameter %[[#LONG]]
+; CHECK-DAG: %[[#CONST0:]] = OpConstant %[[#INT]] 0
+; CHECK-DAG: %[[#CONST2:]] = OpConstant %[[#INT]] 2
+; CHECK: %[[#]] = OpAtomicExchange %[[#LONG]] %[[#PARAM]] %[[#CONST2]] %[[#CONST0]] %[[#VALUE]]
+define void @test_atomic_xchg(ptr addrspace(1) %p, i64 %val) {
+ %call1 = call i64 @_Z9atom_xchgPU3AS1Vll(ptr addrspace(1) %p, i64 %val)
+ ret void
+}
+
+declare i64 @_Z9atom_xchgPU3AS1Vll(ptr addrspace(1), i64)
>From 8453c626b52598f9e7f9ce9fc5309c495c349371 Mon Sep 17 00:00:00 2001
From: Michal Paszkowski <michal.paszkowski at intel.com>
Date: Mon, 9 Sep 2024 09:51:38 -0700
Subject: [PATCH 2/2] Add -verify-machineinstrs to LITs
---
llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll | 2 +-
llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll | 2 +-
llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll | 2 +-
llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll | 2 +-
llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll
index b7625d43e3f85d..a93f103d6483db 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_dec.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll
index 47622fe9ec0af7..2956f04c0ec9d6 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_inc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll
index a7f29c613770e9..1b816632022e1b 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_max.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll
index d07147f51fb81d..53af3b63dd1b94 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_min.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll b/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll
index 5ccf8eaa136bda..013b4c6694514a 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/atomic_xchg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
; CHECK-DAG: %[[#INT:]] = OpTypeInt 32 0
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