[llvm] [RISCV] Add software pipeliner support (PR #117546)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 2 09:25:05 PST 2024
================
@@ -4136,3 +4136,84 @@ bool RISCV::isVLKnownLE(const MachineOperand &LHS, const MachineOperand &RHS) {
return false;
return LHS.getImm() <= RHS.getImm();
}
+
+namespace {
+class RISCVPipelinerLoopInfo : public TargetInstrInfo::PipelinerLoopInfo {
+ const MachineInstr *LHS;
+ const MachineInstr *RHS;
+ SmallVector<MachineOperand, 4> Cond;
+
+public:
+ RISCVPipelinerLoopInfo(const MachineInstr *LHS, const MachineInstr *RHS,
+ const SmallVectorImpl<MachineOperand> &Cond)
+ : LHS(LHS), RHS(RHS), Cond(Cond.begin(), Cond.end()) {}
+
+ bool shouldIgnoreForPipelining(const MachineInstr *MI) const override {
+ // Make the instructions for loop control be placed in stage 0.
+ // The predecessors of LHS/RHS are considered by the caller.
+ if (LHS && MI == LHS)
+ return true;
+ if (RHS && MI == RHS)
+ return true;
+ return false;
+ }
+
+ std::optional<bool> createTripCountGreaterCondition(
+ int TC, MachineBasicBlock &MBB,
+ SmallVectorImpl<MachineOperand> &CondParam) override {
+ // A branch instruction will be inserted as "if (Cond) goto epilogue".
+ // Cond is normalized for such use.
+ // The predecessors of the branch are assumed to have already been inserted.
+ CondParam = Cond;
+ return {};
+ }
+
+ void setPreheader(MachineBasicBlock *NewPreheader) override {}
+
+ void adjustTripCount(int TripCountAdjust) override {}
+
+ void disposed() override {}
+};
+} // namespace
+
+std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo>
+RISCVInstrInfo::analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const {
+ MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
+ SmallVector<MachineOperand, 4> Cond;
----------------
topperc wrote:
Should this be `SmallVector<MachineOperand, 3>` to match the number of push_back calls in AnalyzeBranch?
https://github.com/llvm/llvm-project/pull/117546
More information about the llvm-commits
mailing list