[llvm] [AMDGPU] Emit amdgcn.if.break in the same BB as amdgcn.loop (PR #118081)

[Jay Foad via llvm-commits]

https://github.com/jayfoad approved this pull request.

LGTM. It fixes real problems and seems pretty conservative.

I'm not sure if there is a fundamental reason that putting amdgcn.if.break in an innerer loop cannot work, but it certainly does not work as-is. SILowerI1Copies would need to do soemthing with the mask value returned by this intrinsic. (Maybe that would happen automatically if the intrinsic returned a divergent i1 value instead of a uniform i64 ???)

https://github.com/llvm/llvm-project/pull/118081