[llvm] 3348b46 - [X86][compiler-rt] Split CPU names even they have the same subtype (#118237)
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Mon Dec 2 02:51:23 PST 2024
Author: Phoebe Wang
Date: 2024-12-02T18:51:19+08:00
New Revision: 3348b4688f570d5be3180f80c888325958c37db7
URL: https://github.com/llvm/llvm-project/commit/3348b4688f570d5be3180f80c888325958c37db7
DIFF: https://github.com/llvm/llvm-project/commit/3348b4688f570d5be3180f80c888325958c37db7.diff
LOG: [X86][compiler-rt] Split CPU names even they have the same subtype (#118237)
Fixes: #118205
Added:
Modified:
compiler-rt/lib/builtins/cpu_model/x86.c
llvm/lib/TargetParser/Host.cpp
Removed:
################################################################################
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 3315dceb7f5622..f9b95d2faf06ae 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -461,16 +461,31 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Alderlake:
case 0x97:
case 0x9a:
+ CPU = "alderlake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_ALDERLAKE;
+ break;
+
// Raptorlake:
case 0xb7:
case 0xba:
case 0xbf:
+ CPU = "raptorlake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_ALDERLAKE;
+ break;
+
// Meteorlake:
case 0xaa:
case 0xac:
+ CPU = "meteorlake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_ALDERLAKE;
+ break;
+
// Gracemont:
case 0xbe:
- CPU = "alderlake";
+ CPU = "gracement";
*Type = INTEL_COREI7;
*Subtype = INTEL_COREI7_ALDERLAKE;
break;
@@ -486,9 +501,14 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Arrowlake S:
case 0xc6:
+ CPU = "arrowlake-s";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_ARROWLAKE_S;
+ break;
+
// Lunarlake:
case 0xbd:
- CPU = "arrowlake-s";
+ CPU = "lunarlake";
*Type = INTEL_COREI7;
*Subtype = INTEL_COREI7_ARROWLAKE_S;
break;
@@ -510,6 +530,11 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Emerald Rapids:
case 0xcf:
+ CPU = "emeraldrapids";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_SAPPHIRERAPIDS;
+ break;
+
// Sapphire Rapids:
case 0x8f:
CPU = "sapphirerapids";
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 6e06de323fadad..4457e481def10a 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -808,16 +808,31 @@ static StringRef getIntelProcessorTypeAndSubtype(unsigned Family,
// Alderlake:
case 0x97:
case 0x9a:
+ CPU = "alderlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ALDERLAKE;
+ break;
+
// Gracemont
case 0xbe:
+ CPU = "gracement";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ALDERLAKE;
+ break;
+
// Raptorlake:
case 0xb7:
case 0xba:
case 0xbf:
+ CPU = "raptorlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ALDERLAKE;
+ break;
+
// Meteorlake:
case 0xaa:
case 0xac:
- CPU = "alderlake";
+ CPU = "meteorlake";
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_ALDERLAKE;
break;
@@ -833,9 +848,14 @@ static StringRef getIntelProcessorTypeAndSubtype(unsigned Family,
// Arrowlake S:
case 0xc6:
+ CPU = "arrowlake-s";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ARROWLAKE_S;
+ break;
+
// Lunarlake:
case 0xbd:
- CPU = "arrowlake-s";
+ CPU = "lunarlake";
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_ARROWLAKE_S;
break;
@@ -871,6 +891,11 @@ static StringRef getIntelProcessorTypeAndSubtype(unsigned Family,
// Emerald Rapids:
case 0xcf:
+ CPU = "emeraldrapids";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_SAPPHIRERAPIDS;
+ break;
+
// Sapphire Rapids:
case 0x8f:
CPU = "sapphirerapids";
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