[llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)

[Craig Topper via llvm-commits]

================
@@ -17910,6 +17910,13 @@ AArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
   SDValue ShiftLHS = N->getOperand(0);
   EVT VT = N->getValueType(0);
 
+  if (!ShiftLHS->hasOneUse())
----------------
topperc wrote:

There was a holiday in the US on Thursday so I'm a little behind on reviews right now.

https://github.com/llvm/llvm-project/pull/101294