[llvm] Fix validateOperandClass for non Phyical Reg (PR #118146)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-tablegen

Author: Jinsong Ji (jsji)

<details>
<summary>Changes</summary>

https://github.com/llvm/llvm-project/commit/b71704436e61
Rewrote the register operands handling,
but the Table only contains physical regs, we will SEGV when there are
non physical regs.


---
Full diff: https://github.com/llvm/llvm-project/pull/118146.diff


1 Files Affected:

- (modified) llvm/utils/TableGen/AsmMatcherEmitter.cpp (+3-2) 


``````````diff
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 28efd780c5c615..1823783e82be4a 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -2522,8 +2522,9 @@ static void emitValidateOperandClass(const CodeGenTarget &Target,
   for (auto &MatchClassName : Table)
     OS << "      " << MatchClassName << ",\n";
   OS << "    };\n\n";
-  OS << "    MatchClassKind OpKind = "
-        "(MatchClassKind)Table[Operand.getReg().id()];\n";
+  OS << "    auto RegID=Operand.getReg().id();\n";
+  OS << "    MatchClassKind OpKind =  Register::isPhysicalRegister(RegID)?"
+        "(MatchClassKind)Table[RegID]: InvalidMatchClass;\n";
   OS << "    return isSubclass(OpKind, Kind) ? "
      << "(unsigned)MCTargetAsmParser::Match_Success :\n                     "
      << "                 getDiagKindFromRegisterClass(Kind);\n  }\n\n";

``````````

</details>


https://github.com/llvm/llvm-project/pull/118146