[llvm] [AArch64][SME2] Add FORM_STRIDED_TUPLE pseudo nodes (PR #116399)

[Sander de Smalen via llvm-commits]

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@@ -8666,6 +8671,77 @@ void AArch64TargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
     }
   }
 
+  if (MI.getOpcode() == AArch64::FORM_STRIDED_TUPLE_X2_PSEUDO ||
+      MI.getOpcode() == AArch64::FORM_STRIDED_TUPLE_X4_PSEUDO) {
+    MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
+    bool UseFormStrided = false;
+    unsigned Size =
+        MI.getOpcode() == AArch64::FORM_STRIDED_TUPLE_X2_PSEUDO ? 2 : 4;
+
+    // The FORM_STRIDED_TUPLE pseudo should only be used if the input operands
+    // are copy nodes where the source register is in a StridedOrContiguous
+    // class. For example:
+    //   %3:zpr2stridedorcontiguous = LD1B_2Z_IMM_PSEUDO ..
+    //   %4:zpr = COPY %3.zsub1:zpr2stridedorcontiguous
+    //   %5:zpr = COPY %3.zsub0:zpr2stridedorcontiguous
+    //   %6:zpr2stridedorcontiguous = LD1B_2Z_PSEUDO ..
+    //   %7:zpr = COPY %6.zsub1:zpr2stridedorcontiguous
+    //   %8:zpr = COPY %6.zsub0:zpr2stridedorcontiguous
+    //   %9:zpr2mul2 = FORM_STRIDED_TUPLE_X2_PSEUDO %5:zpr, %8:zpr
+
+    SmallVector<unsigned, 4> OpSubRegs;
+    for (unsigned I = 1; I < MI.getNumOperands(); ++I) {
+      MachineOperand &MO = MI.getOperand(I);
+      if (!MO.isReg())
+        continue;
+
+      MachineOperand *Def = MRI.getOneDef(MO.getReg());
+      if (!Def || !Def->isReg() || !Def->getParent()->isCopy())
+        continue;
+
+      MachineInstr *Cpy = Def->getParent();
+      MachineOperand CpyOp = Cpy->getOperand(1);
+      if (!CpyOp.isReg())
+        continue;
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sdesmalen-arm wrote:

I think this is always the case for COPY? If so, this check can be removed.

https://github.com/llvm/llvm-project/pull/116399