[llvm] 5c181a9 - [X86] update vector shift lowering tests to take poison arg instead of undef
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 29 08:03:51 PST 2024
Author: Simon Pilgrim
Date: 2024-11-29T16:03:35Z
New Revision: 5c181a9191bfb758575329ff7eb8db4fc46ffac9
URL: https://github.com/llvm/llvm-project/commit/5c181a9191bfb758575329ff7eb8db4fc46ffac9
DIFF: https://github.com/llvm/llvm-project/commit/5c181a9191bfb758575329ff7eb8db4fc46ffac9.diff
LOG: [X86] update vector shift lowering tests to take poison arg instead of undef
Added:
Modified:
llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
llvm/test/CodeGen/X86/vector-shift-shl-128.ll
llvm/test/CodeGen/X86/vector-shift-shl-256.ll
llvm/test/CodeGen/X86/vector-shift-shl-512.ll
llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
index 4d4739232e7a6f..b5571edfa522cd 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
@@ -689,7 +689,7 @@ define <2 x i64> @splatvar_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
; X86-SSE-NEXT: pxor %xmm2, %xmm0
; X86-SSE-NEXT: psubq %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i64> %b, <2 x i64> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i64> %b, <2 x i64> poison, <2 x i32> zeroinitializer
%shift = ashr <2 x i64> %a, %splat
ret <2 x i64> %shift
}
@@ -738,7 +738,7 @@ define <4 x i32> @splatvar_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
; X86-SSE-NEXT: psrad %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer
%shift = ashr <4 x i32> %a, %splat
ret <4 x i32> %shift
}
@@ -787,7 +787,7 @@ define <8 x i16> @splatvar_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psraw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i16> %a, %splat
ret <8 x i16> %shift
}
@@ -924,7 +924,7 @@ define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; X86-SSE-NEXT: pxor %xmm2, %xmm0
; X86-SSE-NEXT: psubb %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer
%shift = ashr <16 x i8> %a, %splat
ret <16 x i8> %shift
}
@@ -1008,7 +1008,7 @@ define <2 x i64> @splatvar_modulo_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwi
; X86-SSE-NEXT: psubq %xmm2, %xmm0
; X86-SSE-NEXT: retl
%mod = and <2 x i64> %b, <i64 63, i64 63>
- %splat = shufflevector <2 x i64> %mod, <2 x i64> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i64> %mod, <2 x i64> poison, <2 x i32> zeroinitializer
%shift = ashr <2 x i64> %a, %splat
ret <2 x i64> %shift
}
@@ -1050,7 +1050,7 @@ define <4 x i32> @splatvar_modulo_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwi
; X86-SSE-NEXT: psrad %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <4 x i32> %mod, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i32> %mod, <4 x i32> poison, <4 x i32> zeroinitializer
%shift = ashr <4 x i32> %a, %splat
ret <4 x i32> %shift
}
@@ -1092,7 +1092,7 @@ define <8 x i16> @splatvar_modulo_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwi
; X86-SSE-NEXT: psraw %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <8 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <8 x i16> %mod, <8 x i16> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i16> %mod, <8 x i16> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i16> %a, %splat
ret <8 x i16> %shift
}
@@ -1234,7 +1234,7 @@ define <16 x i8> @splatvar_modulo_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwi
; X86-SSE-NEXT: psubb %xmm2, %xmm0
; X86-SSE-NEXT: retl
%mod = and <16 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <16 x i8> %mod, <16 x i8> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i8> %mod, <16 x i8> poison, <16 x i32> zeroinitializer
%shift = ashr <16 x i8> %a, %splat
ret <16 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-256.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
index 1ebefe6d0d0d3a..cc64b4375e45ba 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
@@ -732,7 +732,7 @@ define <4 x i64> @splatvar_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
; X86-AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0
; X86-AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <4 x i64> %b, <4 x i64> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i64> %b, <4 x i64> poison, <4 x i32> zeroinitializer
%shift = ashr <4 x i64> %a, %splat
ret <4 x i64> %shift
}
@@ -794,7 +794,7 @@ define <8 x i32> @splatvar_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
; X86-AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
; X86-AVX2-NEXT: vpsrad %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <8 x i32> %b, <8 x i32> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i32> %a, %splat
ret <8 x i32> %shift
}
@@ -856,7 +856,7 @@ define <16 x i16> @splatvar_shift_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind
; X86-AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; X86-AVX2-NEXT: vpsraw %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <16 x i16> %b, <16 x i16> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer
%shift = ashr <16 x i16> %a, %splat
ret <16 x i16> %shift
}
@@ -998,7 +998,7 @@ define <32 x i8> @splatvar_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; X86-AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: vpsubb %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer
%shift = ashr <32 x i8> %a, %splat
ret <32 x i8> %shift
}
@@ -1096,7 +1096,7 @@ define <4 x i64> @splatvar_modulo_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwi
; X86-AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <4 x i64> %b, <i64 63, i64 63, i64 63, i64 63>
- %splat = shufflevector <4 x i64> %mod, <4 x i64> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i64> %mod, <4 x i64> poison, <4 x i32> zeroinitializer
%shift = ashr <4 x i64> %a, %splat
ret <4 x i64> %shift
}
@@ -1159,7 +1159,7 @@ define <8 x i32> @splatvar_modulo_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwi
; X86-AVX2-NEXT: vpsrad %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <8 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <8 x i32> %mod, <8 x i32> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i32> %mod, <8 x i32> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i32> %a, %splat
ret <8 x i32> %shift
}
@@ -1222,7 +1222,7 @@ define <16 x i16> @splatvar_modulo_shift_v16i16(<16 x i16> %a, <16 x i16> %b) no
; X86-AVX2-NEXT: vpsraw %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <16 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <16 x i16> %mod, <16 x i16> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i16> %mod, <16 x i16> poison, <16 x i32> zeroinitializer
%shift = ashr <16 x i16> %a, %splat
ret <16 x i16> %shift
}
@@ -1369,7 +1369,7 @@ define <32 x i8> @splatvar_modulo_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwi
; X86-AVX2-NEXT: vpsubb %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <32 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <32 x i8> %mod, <32 x i8> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i8> %mod, <32 x i8> poison, <32 x i32> zeroinitializer
%shift = ashr <32 x i8> %a, %splat
ret <32 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
index b70407c0b96a42..738092a7825e0a 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
@@ -150,7 +150,7 @@ define <8 x i64> @splatvar_shift_v8i64(<8 x i64> %a, <8 x i64> %b) nounwind {
; ALL: # %bb.0:
; ALL-NEXT: vpsraq %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
- %splat = shufflevector <8 x i64> %b, <8 x i64> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i64> %b, <8 x i64> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i64> %a, %splat
ret <8 x i64> %shift
}
@@ -161,7 +161,7 @@ define <16 x i32> @splatvar_shift_v16i32(<16 x i32> %a, <16 x i32> %b) nounwind
; ALL-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
; ALL-NEXT: vpsrad %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
- %splat = shufflevector <16 x i32> %b, <16 x i32> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer
%shift = ashr <16 x i32> %a, %splat
ret <16 x i32> %shift
}
@@ -181,7 +181,7 @@ define <32 x i16> @splatvar_shift_v32i16(<32 x i16> %a, <32 x i16> %b) nounwind
; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX512BW-NEXT: vpsraw %xmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
- %splat = shufflevector <32 x i16> %b, <32 x i16> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer
%shift = ashr <32 x i16> %a, %splat
ret <32 x i16> %shift
}
@@ -221,7 +221,7 @@ define <64 x i8> @splatvar_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; AVX512BW-NEXT: vpternlogq $108, %zmm0, %zmm2, %zmm1
; AVX512BW-NEXT: vpsubb %zmm2, %zmm1, %zmm0
; AVX512BW-NEXT: retq
- %splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
+ %splat = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer
%shift = ashr <64 x i8> %a, %splat
ret <64 x i8> %shift
}
@@ -237,7 +237,7 @@ define <8 x i64> @splatvar_modulo_shift_v8i64(<8 x i64> %a, <8 x i64> %b) nounwi
; ALL-NEXT: vpsraq %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
%mod = and <8 x i64> %b, <i64 63, i64 63, i64 63, i64 63, i64 63, i64 63, i64 63, i64 63>
- %splat = shufflevector <8 x i64> %mod, <8 x i64> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i64> %mod, <8 x i64> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i64> %a, %splat
ret <8 x i64> %shift
}
@@ -249,7 +249,7 @@ define <16 x i32> @splatvar_modulo_shift_v16i32(<16 x i32> %a, <16 x i32> %b) no
; ALL-NEXT: vpsrad %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
%mod = and <16 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <16 x i32> %mod, <16 x i32> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i32> %mod, <16 x i32> poison, <16 x i32> zeroinitializer
%shift = ashr <16 x i32> %a, %splat
ret <16 x i32> %shift
}
@@ -270,7 +270,7 @@ define <32 x i16> @splatvar_modulo_shift_v32i16(<32 x i16> %a, <32 x i16> %b) no
; AVX512BW-NEXT: vpsraw %xmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%mod = and <32 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <32 x i16> %mod, <32 x i16> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i16> %mod, <32 x i16> poison, <32 x i32> zeroinitializer
%shift = ashr <32 x i16> %a, %splat
ret <32 x i16> %shift
}
@@ -311,7 +311,7 @@ define <64 x i8> @splatvar_modulo_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwi
; AVX512BW-NEXT: vpsubb %zmm2, %zmm1, %zmm0
; AVX512BW-NEXT: retq
%mod = and <64 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <64 x i8> %mod, <64 x i8> undef, <64 x i32> zeroinitializer
+ %splat = shufflevector <64 x i8> %mod, <64 x i8> poison, <64 x i32> zeroinitializer
%shift = ashr <64 x i8> %a, %splat
ret <64 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
index 2ec9de0cb447f5..95d8c604aace15 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
@@ -1197,7 +1197,7 @@ define <2 x i32> @splatvar_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind {
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
; X86-SSE-NEXT: psrad %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i32> %b, <2 x i32> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer
%shift = ashr <2 x i32> %a, %splat
ret <2 x i32> %shift
}
@@ -1246,7 +1246,7 @@ define <4 x i16> @splatvar_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psraw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i16> %b, <4 x i16> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer
%shift = ashr <4 x i16> %a, %splat
ret <4 x i16> %shift
}
@@ -1295,7 +1295,7 @@ define <2 x i16> @splatvar_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psraw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i16> %b, <2 x i16> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer
%shift = ashr <2 x i16> %a, %splat
ret <2 x i16> %shift
}
@@ -1433,7 +1433,7 @@ define <8 x i8> @splatvar_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind {
; X86-SSE-NEXT: pxor %xmm2, %xmm0
; X86-SSE-NEXT: psubb %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <8 x i8> %b, <8 x i8> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer
%shift = ashr <8 x i8> %a, %splat
ret <8 x i8> %shift
}
@@ -1571,7 +1571,7 @@ define <4 x i8> @splatvar_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind {
; X86-SSE-NEXT: pxor %xmm2, %xmm0
; X86-SSE-NEXT: psubb %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i8> %b, <4 x i8> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer
%shift = ashr <4 x i8> %a, %splat
ret <4 x i8> %shift
}
@@ -1700,7 +1700,7 @@ define <2 x i8> @splatvar_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind {
; X86-SSE-NEXT: pxor %xmm2, %xmm0
; X86-SSE-NEXT: psubb %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i8> %b, <2 x i8> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer
%shift = ashr <2 x i8> %a, %splat
ret <2 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
index 177d8f78b5a8d4..b453f925b94e80 100644
--- a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
@@ -450,22 +450,22 @@ for.body.preheader40:
vector.ph:
%n.vec = and i64 %wide.trip.count, 4294967264
- %broadcast.splatinsert20 = insertelement <8 x i32> undef, i32 %amt0, i32 0
- %broadcast.splat21 = shufflevector <8 x i32> %broadcast.splatinsert20, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert22 = insertelement <8 x i32> undef, i32 %amt1, i32 0
- %broadcast.splat23 = shufflevector <8 x i32> %broadcast.splatinsert22, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert24 = insertelement <8 x i32> undef, i32 %amt0, i32 0
- %broadcast.splat25 = shufflevector <8 x i32> %broadcast.splatinsert24, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert26 = insertelement <8 x i32> undef, i32 %amt1, i32 0
- %broadcast.splat27 = shufflevector <8 x i32> %broadcast.splatinsert26, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert28 = insertelement <8 x i32> undef, i32 %amt0, i32 0
- %broadcast.splat29 = shufflevector <8 x i32> %broadcast.splatinsert28, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert30 = insertelement <8 x i32> undef, i32 %amt1, i32 0
- %broadcast.splat31 = shufflevector <8 x i32> %broadcast.splatinsert30, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert32 = insertelement <8 x i32> undef, i32 %amt0, i32 0
- %broadcast.splat33 = shufflevector <8 x i32> %broadcast.splatinsert32, <8 x i32> undef, <8 x i32> zeroinitializer
- %broadcast.splatinsert34 = insertelement <8 x i32> undef, i32 %amt1, i32 0
- %broadcast.splat35 = shufflevector <8 x i32> %broadcast.splatinsert34, <8 x i32> undef, <8 x i32> zeroinitializer
+ %broadcast.splatinsert20 = insertelement <8 x i32> poison, i32 %amt0, i32 0
+ %broadcast.splat21 = shufflevector <8 x i32> %broadcast.splatinsert20, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert22 = insertelement <8 x i32> poison, i32 %amt1, i32 0
+ %broadcast.splat23 = shufflevector <8 x i32> %broadcast.splatinsert22, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert24 = insertelement <8 x i32> poison, i32 %amt0, i32 0
+ %broadcast.splat25 = shufflevector <8 x i32> %broadcast.splatinsert24, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert26 = insertelement <8 x i32> poison, i32 %amt1, i32 0
+ %broadcast.splat27 = shufflevector <8 x i32> %broadcast.splatinsert26, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert28 = insertelement <8 x i32> poison, i32 %amt0, i32 0
+ %broadcast.splat29 = shufflevector <8 x i32> %broadcast.splatinsert28, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert30 = insertelement <8 x i32> poison, i32 %amt1, i32 0
+ %broadcast.splat31 = shufflevector <8 x i32> %broadcast.splatinsert30, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert32 = insertelement <8 x i32> poison, i32 %amt0, i32 0
+ %broadcast.splat33 = shufflevector <8 x i32> %broadcast.splatinsert32, <8 x i32> poison, <8 x i32> zeroinitializer
+ %broadcast.splatinsert34 = insertelement <8 x i32> poison, i32 %amt1, i32 0
+ %broadcast.splat35 = shufflevector <8 x i32> %broadcast.splatinsert34, <8 x i32> poison, <8 x i32> zeroinitializer
br label %vector.body
vector.body:
@@ -655,12 +655,12 @@ entry:
vector.ph:
%n.vec = and i64 %wide.trip.count, 4294967292
- %splatinsert18 = insertelement <4 x i32> undef, i32 %amt0, i32 0
- %splat1 = shufflevector <4 x i32> %splatinsert18, <4 x i32> undef, <4 x i32> zeroinitializer
- %splatinsert20 = insertelement <4 x i32> undef, i32 %amt1, i32 0
- %splat2 = shufflevector <4 x i32> %splatinsert20, <4 x i32> undef, <4 x i32> zeroinitializer
- %splatinsert22 = insertelement <4 x i32> undef, i32 %x, i32 0
- %splat3 = shufflevector <4 x i32> %splatinsert22, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splatinsert18 = insertelement <4 x i32> poison, i32 %amt0, i32 0
+ %splat1 = shufflevector <4 x i32> %splatinsert18, <4 x i32> poison, <4 x i32> zeroinitializer
+ %splatinsert20 = insertelement <4 x i32> poison, i32 %amt1, i32 0
+ %splat2 = shufflevector <4 x i32> %splatinsert20, <4 x i32> poison, <4 x i32> zeroinitializer
+ %splatinsert22 = insertelement <4 x i32> poison, i32 %x, i32 0
+ %splat3 = shufflevector <4 x i32> %splatinsert22, <4 x i32> poison, <4 x i32> zeroinitializer
br label %vector.body
vector.body:
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
index 4caa7da4ce136a..467c1574180da1 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
@@ -544,7 +544,7 @@ define <2 x i64> @splatvar_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
; X86-SSE: # %bb.0:
; X86-SSE-NEXT: psrlq %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i64> %b, <2 x i64> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i64> %b, <2 x i64> poison, <2 x i32> zeroinitializer
%shift = lshr <2 x i64> %a, %splat
ret <2 x i64> %shift
}
@@ -593,7 +593,7 @@ define <4 x i32> @splatvar_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
; X86-SSE-NEXT: psrld %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer
%shift = lshr <4 x i32> %a, %splat
ret <4 x i32> %shift
}
@@ -642,7 +642,7 @@ define <8 x i16> @splatvar_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psrlw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i16> %a, %splat
ret <8 x i16> %shift
}
@@ -759,7 +759,7 @@ define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer
%shift = lshr <16 x i8> %a, %splat
ret <16 x i8> %shift
}
@@ -805,7 +805,7 @@ define <2 x i64> @splatvar_modulo_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwi
; X86-SSE-NEXT: psrlq %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <2 x i64> %b, <i64 63, i64 63>
- %splat = shufflevector <2 x i64> %mod, <2 x i64> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i64> %mod, <2 x i64> poison, <2 x i32> zeroinitializer
%shift = lshr <2 x i64> %a, %splat
ret <2 x i64> %shift
}
@@ -847,7 +847,7 @@ define <4 x i32> @splatvar_modulo_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwi
; X86-SSE-NEXT: psrld %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <4 x i32> %mod, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i32> %mod, <4 x i32> poison, <4 x i32> zeroinitializer
%shift = lshr <4 x i32> %a, %splat
ret <4 x i32> %shift
}
@@ -889,7 +889,7 @@ define <8 x i16> @splatvar_modulo_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwi
; X86-SSE-NEXT: psrlw %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <8 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <8 x i16> %mod, <8 x i16> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i16> %mod, <8 x i16> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i16> %a, %splat
ret <8 x i16> %shift
}
@@ -1011,7 +1011,7 @@ define <16 x i8> @splatvar_modulo_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwi
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <16 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <16 x i8> %mod, <16 x i8> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i8> %mod, <16 x i8> poison, <16 x i32> zeroinitializer
%shift = lshr <16 x i8> %a, %splat
ret <16 x i8> %shift
}
@@ -1760,8 +1760,8 @@ define <4 x i32> @vector_variable_shift_right(<4 x i1> %cond, <4 x i32> %x, <4 x
; X86-SSE-NEXT: movl %ebp, %esp
; X86-SSE-NEXT: popl %ebp
; X86-SSE-NEXT: retl
- %splat1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
- %splat2 = shufflevector <4 x i32> %y, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat1 = shufflevector <4 x i32> %x, <4 x i32> poison, <4 x i32> zeroinitializer
+ %splat2 = shufflevector <4 x i32> %y, <4 x i32> poison, <4 x i32> zeroinitializer
%sel = select <4 x i1> %cond, <4 x i32> %splat1, <4 x i32> %splat2
%sh = lshr <4 x i32> %z, %sel
ret <4 x i32> %sh
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-256.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
index cc3b1a72e5b538..ca303b4c7ebf67 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
@@ -572,7 +572,7 @@ define <4 x i64> @splatvar_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
; X86-AVX2: # %bb.0:
; X86-AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <4 x i64> %b, <4 x i64> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i64> %b, <4 x i64> poison, <4 x i32> zeroinitializer
%shift = lshr <4 x i64> %a, %splat
ret <4 x i64> %shift
}
@@ -634,7 +634,7 @@ define <8 x i32> @splatvar_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
; X86-AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
; X86-AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <8 x i32> %b, <8 x i32> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i32> %a, %splat
ret <8 x i32> %shift
}
@@ -696,7 +696,7 @@ define <16 x i16> @splatvar_shift_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind
; X86-AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; X86-AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <16 x i16> %b, <16 x i16> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer
%shift = lshr <16 x i16> %a, %splat
ret <16 x i16> %shift
}
@@ -811,7 +811,7 @@ define <32 x i8> @splatvar_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; X86-AVX2-NEXT: vpbroadcastb %xmm1, %ymm1
; X86-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer
%shift = lshr <32 x i8> %a, %splat
ret <32 x i8> %shift
}
@@ -878,7 +878,7 @@ define <4 x i64> @splatvar_modulo_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwi
; X86-AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <4 x i64> %b, <i64 63, i64 63, i64 63, i64 63>
- %splat = shufflevector <4 x i64> %mod, <4 x i64> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i64> %mod, <4 x i64> poison, <4 x i32> zeroinitializer
%shift = lshr <4 x i64> %a, %splat
ret <4 x i64> %shift
}
@@ -941,7 +941,7 @@ define <8 x i32> @splatvar_modulo_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwi
; X86-AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <8 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <8 x i32> %mod, <8 x i32> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i32> %mod, <8 x i32> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i32> %a, %splat
ret <8 x i32> %shift
}
@@ -1004,7 +1004,7 @@ define <16 x i16> @splatvar_modulo_shift_v16i16(<16 x i16> %a, <16 x i16> %b) no
; X86-AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <16 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <16 x i16> %mod, <16 x i16> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i16> %mod, <16 x i16> poison, <16 x i32> zeroinitializer
%shift = lshr <16 x i16> %a, %splat
ret <16 x i16> %shift
}
@@ -1124,7 +1124,7 @@ define <32 x i8> @splatvar_modulo_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwi
; X86-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <32 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <32 x i8> %mod, <32 x i8> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i8> %mod, <32 x i8> poison, <32 x i32> zeroinitializer
%shift = lshr <32 x i8> %a, %splat
ret <32 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
index 81dc63ba33cb03..103d5702fb93a1 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
@@ -114,7 +114,7 @@ define <8 x i64> @splatvar_shift_v8i64(<8 x i64> %a, <8 x i64> %b) nounwind {
; ALL: # %bb.0:
; ALL-NEXT: vpsrlq %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
- %splat = shufflevector <8 x i64> %b, <8 x i64> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i64> %b, <8 x i64> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i64> %a, %splat
ret <8 x i64> %shift
}
@@ -125,7 +125,7 @@ define <16 x i32> @splatvar_shift_v16i32(<16 x i32> %a, <16 x i32> %b) nounwind
; ALL-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
; ALL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
- %splat = shufflevector <16 x i32> %b, <16 x i32> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer
%shift = lshr <16 x i32> %a, %splat
ret <16 x i32> %shift
}
@@ -145,7 +145,7 @@ define <32 x i16> @splatvar_shift_v32i16(<32 x i16> %a, <32 x i16> %b) nounwind
; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
- %splat = shufflevector <32 x i16> %b, <32 x i16> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer
%shift = lshr <32 x i16> %a, %splat
ret <32 x i16> %shift
}
@@ -176,7 +176,7 @@ define <64 x i8> @splatvar_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
- %splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
+ %splat = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer
%shift = lshr <64 x i8> %a, %splat
ret <64 x i8> %shift
}
@@ -192,7 +192,7 @@ define <8 x i64> @splatvar_modulo_shift_v8i64(<8 x i64> %a, <8 x i64> %b) nounwi
; ALL-NEXT: vpsrlq %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
%mod = and <8 x i64> %b, <i64 63, i64 63, i64 63, i64 63, i64 63, i64 63, i64 63, i64 63>
- %splat = shufflevector <8 x i64> %mod, <8 x i64> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i64> %mod, <8 x i64> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i64> %a, %splat
ret <8 x i64> %shift
}
@@ -204,7 +204,7 @@ define <16 x i32> @splatvar_modulo_shift_v16i32(<16 x i32> %a, <16 x i32> %b) no
; ALL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
%mod = and <16 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <16 x i32> %mod, <16 x i32> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i32> %mod, <16 x i32> poison, <16 x i32> zeroinitializer
%shift = lshr <16 x i32> %a, %splat
ret <16 x i32> %shift
}
@@ -225,7 +225,7 @@ define <32 x i16> @splatvar_modulo_shift_v32i16(<32 x i16> %a, <32 x i16> %b) no
; AVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%mod = and <32 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <32 x i16> %mod, <32 x i16> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i16> %mod, <32 x i16> poison, <32 x i32> zeroinitializer
%shift = lshr <32 x i16> %a, %splat
ret <32 x i16> %shift
}
@@ -257,7 +257,7 @@ define <64 x i8> @splatvar_modulo_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwi
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%mod = and <64 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <64 x i8> %mod, <64 x i8> undef, <64 x i32> zeroinitializer
+ %splat = shufflevector <64 x i8> %mod, <64 x i8> poison, <64 x i32> zeroinitializer
%shift = lshr <64 x i8> %a, %splat
ret <64 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
index fe349e9ff995d9..e0d1c256ebecf9 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
@@ -963,7 +963,7 @@ define <2 x i32> @splatvar_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind {
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
; X86-SSE-NEXT: psrld %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i32> %b, <2 x i32> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer
%shift = lshr <2 x i32> %a, %splat
ret <2 x i32> %shift
}
@@ -1012,7 +1012,7 @@ define <4 x i16> @splatvar_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psrlw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i16> %b, <4 x i16> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer
%shift = lshr <4 x i16> %a, %splat
ret <4 x i16> %shift
}
@@ -1061,7 +1061,7 @@ define <2 x i16> @splatvar_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psrlw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i16> %b, <2 x i16> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer
%shift = lshr <2 x i16> %a, %splat
ret <2 x i16> %shift
}
@@ -1179,7 +1179,7 @@ define <8 x i8> @splatvar_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <8 x i8> %b, <8 x i8> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer
%shift = lshr <8 x i8> %a, %splat
ret <8 x i8> %shift
}
@@ -1297,7 +1297,7 @@ define <4 x i8> @splatvar_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i8> %b, <4 x i8> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer
%shift = lshr <4 x i8> %a, %splat
ret <4 x i8> %shift
}
@@ -1406,7 +1406,7 @@ define <2 x i8> @splatvar_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i8> %b, <2 x i8> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer
%shift = lshr <2 x i8> %a, %splat
ret <2 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-128.ll b/llvm/test/CodeGen/X86/vector-shift-shl-128.ll
index 902bf8a0e55ce8..4dda9ff09cc62d 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-128.ll
@@ -455,7 +455,7 @@ define <2 x i64> @splatvar_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
; X86-SSE: # %bb.0:
; X86-SSE-NEXT: psllq %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i64> %b, <2 x i64> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i64> %b, <2 x i64> poison, <2 x i32> zeroinitializer
%shift = shl <2 x i64> %a, %splat
ret <2 x i64> %shift
}
@@ -504,7 +504,7 @@ define <4 x i32> @splatvar_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
; X86-SSE-NEXT: pslld %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer
%shift = shl <4 x i32> %a, %splat
ret <4 x i32> %shift
}
@@ -553,7 +553,7 @@ define <8 x i16> @splatvar_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psllw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i16> %a, %splat
ret <8 x i16> %shift
}
@@ -666,7 +666,7 @@ define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer
%shift = shl <16 x i8> %a, %splat
ret <16 x i8> %shift
}
@@ -712,7 +712,7 @@ define <2 x i64> @splatvar_modulo_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwi
; X86-SSE-NEXT: psllq %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <2 x i64> %b, <i64 63, i64 63>
- %splat = shufflevector <2 x i64> %mod, <2 x i64> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i64> %mod, <2 x i64> poison, <2 x i32> zeroinitializer
%shift = shl <2 x i64> %a, %splat
ret <2 x i64> %shift
}
@@ -754,7 +754,7 @@ define <4 x i32> @splatvar_modulo_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwi
; X86-SSE-NEXT: pslld %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <4 x i32> %mod, <4 x i32> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i32> %mod, <4 x i32> poison, <4 x i32> zeroinitializer
%shift = shl <4 x i32> %a, %splat
ret <4 x i32> %shift
}
@@ -796,7 +796,7 @@ define <8 x i16> @splatvar_modulo_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwi
; X86-SSE-NEXT: psllw %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <8 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <8 x i16> %mod, <8 x i16> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i16> %mod, <8 x i16> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i16> %a, %splat
ret <8 x i16> %shift
}
@@ -914,7 +914,7 @@ define <16 x i8> @splatvar_modulo_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwi
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
%mod = and <16 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <16 x i8> %mod, <16 x i8> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i8> %mod, <16 x i8> poison, <16 x i32> zeroinitializer
%shift = shl <16 x i8> %a, %splat
ret <16 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-256.ll b/llvm/test/CodeGen/X86/vector-shift-shl-256.ll
index b4880a6cad70e3..3c6aa642c778c2 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-256.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-256.ll
@@ -502,7 +502,7 @@ define <4 x i64> @splatvar_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
; X86-AVX2: # %bb.0:
; X86-AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <4 x i64> %b, <4 x i64> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i64> %b, <4 x i64> poison, <4 x i32> zeroinitializer
%shift = shl <4 x i64> %a, %splat
ret <4 x i64> %shift
}
@@ -564,7 +564,7 @@ define <8 x i32> @splatvar_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
; X86-AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
; X86-AVX2-NEXT: vpslld %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <8 x i32> %b, <8 x i32> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i32> %a, %splat
ret <8 x i32> %shift
}
@@ -626,7 +626,7 @@ define <16 x i16> @splatvar_shift_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind
; X86-AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; X86-AVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <16 x i16> %b, <16 x i16> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer
%shift = shl <16 x i16> %a, %splat
ret <16 x i16> %shift
}
@@ -736,7 +736,7 @@ define <32 x i8> @splatvar_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
; X86-AVX2-NEXT: vpbroadcastb %xmm1, %ymm1
; X86-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
- %splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer
%shift = shl <32 x i8> %a, %splat
ret <32 x i8> %shift
}
@@ -803,7 +803,7 @@ define <4 x i64> @splatvar_modulo_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwi
; X86-AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <4 x i64> %b, <i64 63, i64 63, i64 63, i64 63>
- %splat = shufflevector <4 x i64> %mod, <4 x i64> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i64> %mod, <4 x i64> poison, <4 x i32> zeroinitializer
%shift = shl <4 x i64> %a, %splat
ret <4 x i64> %shift
}
@@ -866,7 +866,7 @@ define <8 x i32> @splatvar_modulo_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwi
; X86-AVX2-NEXT: vpslld %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <8 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <8 x i32> %mod, <8 x i32> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i32> %mod, <8 x i32> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i32> %a, %splat
ret <8 x i32> %shift
}
@@ -929,7 +929,7 @@ define <16 x i16> @splatvar_modulo_shift_v16i16(<16 x i16> %a, <16 x i16> %b) no
; X86-AVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <16 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <16 x i16> %mod, <16 x i16> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i16> %mod, <16 x i16> poison, <16 x i32> zeroinitializer
%shift = shl <16 x i16> %a, %splat
ret <16 x i16> %shift
}
@@ -1044,7 +1044,7 @@ define <32 x i8> @splatvar_modulo_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwi
; X86-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT: retl
%mod = and <32 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <32 x i8> %mod, <32 x i8> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i8> %mod, <32 x i8> poison, <32 x i32> zeroinitializer
%shift = shl <32 x i8> %a, %splat
ret <32 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-512.ll b/llvm/test/CodeGen/X86/vector-shift-shl-512.ll
index cd729ebbc4330a..a7fb05fbc5ba98 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-512.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-512.ll
@@ -109,7 +109,7 @@ define <8 x i64> @splatvar_shift_v8i64(<8 x i64> %a, <8 x i64> %b) nounwind {
; ALL: # %bb.0:
; ALL-NEXT: vpsllq %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
- %splat = shufflevector <8 x i64> %b, <8 x i64> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i64> %b, <8 x i64> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i64> %a, %splat
ret <8 x i64> %shift
}
@@ -120,7 +120,7 @@ define <16 x i32> @splatvar_shift_v16i32(<16 x i32> %a, <16 x i32> %b) nounwind
; ALL-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
; ALL-NEXT: vpslld %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
- %splat = shufflevector <16 x i32> %b, <16 x i32> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer
%shift = shl <16 x i32> %a, %splat
ret <16 x i32> %shift
}
@@ -140,7 +140,7 @@ define <32 x i16> @splatvar_shift_v32i16(<32 x i16> %a, <32 x i16> %b) nounwind
; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
- %splat = shufflevector <32 x i16> %b, <32 x i16> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer
%shift = shl <32 x i16> %a, %splat
ret <32 x i16> %shift
}
@@ -169,7 +169,7 @@ define <64 x i8> @splatvar_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwind {
; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
- %splat = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
+ %splat = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer
%shift = shl <64 x i8> %a, %splat
ret <64 x i8> %shift
}
@@ -185,7 +185,7 @@ define <8 x i64> @splatvar_modulo_shift_v8i64(<8 x i64> %a, <8 x i64> %b) nounwi
; ALL-NEXT: vpsllq %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
%mod = and <8 x i64> %b, <i64 63, i64 63, i64 63, i64 63, i64 63, i64 63, i64 63, i64 63>
- %splat = shufflevector <8 x i64> %mod, <8 x i64> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i64> %mod, <8 x i64> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i64> %a, %splat
ret <8 x i64> %shift
}
@@ -197,7 +197,7 @@ define <16 x i32> @splatvar_modulo_shift_v16i32(<16 x i32> %a, <16 x i32> %b) no
; ALL-NEXT: vpslld %xmm1, %zmm0, %zmm0
; ALL-NEXT: retq
%mod = and <16 x i32> %b, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
- %splat = shufflevector <16 x i32> %mod, <16 x i32> undef, <16 x i32> zeroinitializer
+ %splat = shufflevector <16 x i32> %mod, <16 x i32> poison, <16 x i32> zeroinitializer
%shift = shl <16 x i32> %a, %splat
ret <16 x i32> %shift
}
@@ -218,7 +218,7 @@ define <32 x i16> @splatvar_modulo_shift_v32i16(<32 x i16> %a, <32 x i16> %b) no
; AVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%mod = and <32 x i16> %b, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
- %splat = shufflevector <32 x i16> %mod, <32 x i16> undef, <32 x i32> zeroinitializer
+ %splat = shufflevector <32 x i16> %mod, <32 x i16> poison, <32 x i32> zeroinitializer
%shift = shl <32 x i16> %a, %splat
ret <32 x i16> %shift
}
@@ -248,7 +248,7 @@ define <64 x i8> @splatvar_modulo_shift_v64i8(<64 x i8> %a, <64 x i8> %b) nounwi
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%mod = and <64 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
- %splat = shufflevector <64 x i8> %mod, <64 x i8> undef, <64 x i32> zeroinitializer
+ %splat = shufflevector <64 x i8> %mod, <64 x i8> poison, <64 x i32> zeroinitializer
%shift = shl <64 x i8> %a, %splat
ret <64 x i8> %shift
}
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
index a44120b6d038ce..f213db0349c31a 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
@@ -816,7 +816,7 @@ define <2 x i32> @splatvar_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind {
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
; X86-SSE-NEXT: pslld %xmm2, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i32> %b, <2 x i32> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer
%shift = shl <2 x i32> %a, %splat
ret <2 x i32> %shift
}
@@ -865,7 +865,7 @@ define <4 x i16> @splatvar_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psllw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i16> %b, <4 x i16> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer
%shift = shl <4 x i16> %a, %splat
ret <4 x i16> %shift
}
@@ -914,7 +914,7 @@ define <2 x i16> @splatvar_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind {
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; X86-SSE-NEXT: psllw %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i16> %b, <2 x i16> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer
%shift = shl <2 x i16> %a, %splat
ret <2 x i16> %shift
}
@@ -1027,7 +1027,7 @@ define <8 x i8> @splatvar_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <8 x i8> %b, <8 x i8> undef, <8 x i32> zeroinitializer
+ %splat = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer
%shift = shl <8 x i8> %a, %splat
ret <8 x i8> %shift
}
@@ -1140,7 +1140,7 @@ define <4 x i8> @splatvar_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <4 x i8> %b, <4 x i8> undef, <4 x i32> zeroinitializer
+ %splat = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer
%shift = shl <4 x i8> %a, %splat
ret <4 x i8> %shift
}
@@ -1246,7 +1246,7 @@ define <2 x i8> @splatvar_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind {
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; X86-SSE-NEXT: pand %xmm1, %xmm0
; X86-SSE-NEXT: retl
- %splat = shufflevector <2 x i8> %b, <2 x i8> undef, <2 x i32> zeroinitializer
+ %splat = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer
%shift = shl <2 x i8> %a, %splat
ret <2 x i8> %shift
}
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