[llvm] e973f7a - [RISCV][Xqcicsr] Instructions have Side Effects (#118089)

[via llvm-commits]

Author: Sam Elliott
Date: 2024-11-29T15:20:05Z
New Revision: e973f7ae52e753ebe53f5414ddf1c4d29e49deb5

URL: https://github.com/llvm/llvm-project/commit/e973f7ae52e753ebe53f5414ddf1c4d29e49deb5
DIFF: https://github.com/llvm/llvm-project/commit/e973f7ae52e753ebe53f5414ddf1c4d29e49deb5.diff

LOG: [RISCV][Xqcicsr] Instructions have Side Effects (#118089)

Xqcicsr was added in #117169. I missed that `hasSideEffects` was set to
0, rather than 1 (which all other CSR-modifying instructions have).

This has no effect on the current assembly-only support, but I think is
worth fixing before I forget. I accidentally fixed the closing comment
in 9300274a12d758368c036812d903b73d70d64ea4.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
index 80d83fce038b29..3f53165d5235e6 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
@@ -50,7 +50,7 @@ class QCIStore_ScaleIdx<bits<4> func4, string opcodestr>
 //===----------------------------------------------------------------------===//
 
 let Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqcicsr" in {
-let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
+let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
   def QC_CSRRWR : RVInstR<0b1000110, 0b000, OPC_SYSTEM, (outs GPR:$rd),
                           (ins GPR:$rs1, GPRNoX0:$rs2), "qc.csrrwr",
                           "$rd, $rs1, $rs2">;