[llvm] 0443622 - [X86] Add test for new _mm_movpi64_epi64 lowering

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2024-11-29T11:57:53Z
New Revision: 044362215d5264280abc807ea1da6c652530c926

URL: https://github.com/llvm/llvm-project/commit/044362215d5264280abc807ea1da6c652530c926
DIFF: https://github.com/llvm/llvm-project/commit/044362215d5264280abc807ea1da6c652530c926.diff

LOG: [X86] Add test for new _mm_movpi64_epi64 lowering

With the MMX retirement, _mm_movpi64_epi64 now lowers to shuffle((__m64)(double)x,(__m64)0) pattern - which demonstrates a unnecessary FPU->GPU->FPU transfer

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/mmx-cvt.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/mmx-cvt.ll b/llvm/test/CodeGen/X86/mmx-cvt.ll
index 51a71dab37f6da..fac886080587f6 100644
--- a/llvm/test/CodeGen/X86/mmx-cvt.ll
+++ b/llvm/test/CodeGen/X86/mmx-cvt.ll
@@ -279,6 +279,22 @@ define <4 x float> @cvt_v2i32_v2f32(ptr) nounwind {
   ret <4 x float> %8
 }
 
+define noundef <2 x i64> @cvt_f64_v2i64(double %a0) {
+; X86-LABEL: cvt_f64_v2i64:
+; X86:       # %bb.0:
+; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT:    retl
+;
+; X64-LABEL: cvt_f64_v2i64:
+; X64:       # %bb.0:
+; X64-NEXT:    movq %xmm0, %rax
+; X64-NEXT:    movq %rax, %xmm0
+; X64-NEXT:    retq
+  %bc = bitcast double %a0 to <1 x i64>
+  %r = shufflevector <1 x i64> %bc, <1 x i64> zeroinitializer, <2 x i32> <i32 0, i32 1>
+  ret <2 x i64> %r
+}
+
 declare <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64>, <1 x i64>)
 declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>)
 declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>)