[llvm] 7ed36b9 - [X86] Add missing REQUIRES to test case for #114360

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2024-11-29T10:35:05Z
New Revision: 7ed36b9ec6147fbada27592292bca28f9f76c983

URL: https://github.com/llvm/llvm-project/commit/7ed36b9ec6147fbada27592292bca28f9f76c983
DIFF: https://github.com/llvm/llvm-project/commit/7ed36b9ec6147fbada27592292bca28f9f76c983.diff

LOG: [X86] Add missing REQUIRES to test case for #114360

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/pr114360.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/pr114360.ll b/llvm/test/CodeGen/X86/pr114360.ll
index 41cf06a77571d7..cf510854cce662 100644
--- a/llvm/test/CodeGen/X86/pr114360.ll
+++ b/llvm/test/CodeGen/X86/pr114360.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; REQUIRES: asserts
 ; RUN: llc < %s -mtriple=x86_64-- -debug-counter=dagcombine=0 | FileCheck %s
 
 ; BUG: shrinkAndImmediate folds away the AND after the ZEXT has already been folded away to SUBREG_TO_REG losing implicit zext.