[llvm] [AArch64] Generate zeroing forms of certain SVE2.2 instructions (2/11) (PR #116828)

Momchil Velikov via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 29 01:51:27 PST 2024


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@@ -571,6 +576,11 @@ multiclass SVE_3_Op_Undef_Pat<ValueType vtd, SDPatternOperator op, ValueType vt1
             (inst $Op1, $Op2, $Op3)>;
 }
 
+class SVE_3_Op_UndefZero_Pat<ValueType vtd, SDPatternOperator op, ValueType vt1,
+                             ValueType vt2, ValueType vt3, Instruction inst>
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momchil-velikov wrote:

This is derived from and follows the naming of `SVE_3_Op_Undef_Pat`.
Likewise `SVE_1_Op_PassthruUndefZero_Pat` is derived from and follows the naming of `SVE_1_Op_PassthruUndef_Pat`.


https://github.com/llvm/llvm-project/pull/116828


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