[llvm] [ARM] Stop gluing ALU nodes to branches / selects (PR #116970)

[Simon Tatham via llvm-commits]

================
@@ -5052,65 +5063,70 @@ let hasSideEffects = 0 in {
 
 let isCommutable = 1, isSelect = 1 in
 def MOVCCr : ARMPseudoInst<(outs GPR:$Rd),
-                           (ins GPR:$false, GPR:$Rm, cmovpred:$p),
-                           4, IIC_iCMOVr,
-                           [(set GPR:$Rd, (ARMcmov GPR:$false, GPR:$Rm,
-                                                   cmovpred:$p))]>,
+                           (ins GPR:$false, GPR:$Rm, pred:$p),
+                           4, IIC_iCMOVr, []>,
              RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
 
 def MOVCCsi : ARMPseudoInst<(outs GPR:$Rd),
-                            (ins GPR:$false, so_reg_imm:$shift, cmovpred:$p),
-                            4, IIC_iCMOVsr,
-                            [(set GPR:$Rd,
-                                  (ARMcmov GPR:$false, so_reg_imm:$shift,
-                                           cmovpred:$p))]>,
+                            (ins GPR:$false, so_reg_imm:$shift, pred:$p),
+                            4, IIC_iCMOVsr, []>,
       RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
 def MOVCCsr : ARMPseudoInst<(outs GPR:$Rd),
-                            (ins GPR:$false, so_reg_reg:$shift, cmovpred:$p),
-                           4, IIC_iCMOVsr,
-  [(set GPR:$Rd, (ARMcmov GPR:$false, so_reg_reg:$shift,
-                            cmovpred:$p))]>,
+                            (ins GPR:$false, so_reg_reg:$shift, pred:$p),
+                           4, IIC_iCMOVsr, []>,
       RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
 
 
 let isMoveImm = 1 in
 def MOVCCi16
     : ARMPseudoInst<(outs GPR:$Rd),
-                    (ins GPR:$false, imm0_65535_expr:$imm, cmovpred:$p),
-                    4, IIC_iMOVi,
-                    [(set GPR:$Rd, (ARMcmov GPR:$false, imm0_65535:$imm,
-                                            cmovpred:$p))]>,
+                    (ins GPR:$false, imm0_65535_expr:$imm, pred:$p),
+                    4, IIC_iMOVi, []>,
       RegConstraint<"$false = $Rd">, Requires<[IsARM, HasV6T2]>,
       Sched<[WriteALU]>;
 
 let isMoveImm = 1 in
 def MOVCCi : ARMPseudoInst<(outs GPR:$Rd),
-                           (ins GPR:$false, mod_imm:$imm, cmovpred:$p),
-                           4, IIC_iCMOVi,
-                           [(set GPR:$Rd, (ARMcmov GPR:$false, mod_imm:$imm,
-                                                   cmovpred:$p))]>,
+                           (ins GPR:$false, mod_imm:$imm, pred:$p),
+                           4, IIC_iCMOVi, []>,
       RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
 
 // Two instruction predicate mov immediate.
 let isMoveImm = 1 in
 def MOVCCi32imm
     : ARMPseudoInst<(outs GPR:$Rd),
-                    (ins GPR:$false, i32imm:$src, cmovpred:$p),
-                    8, IIC_iCMOVix2,
-                    [(set GPR:$Rd, (ARMcmov GPR:$false, imm:$src,
-                                            cmovpred:$p))]>,
+                    (ins GPR:$false, i32imm:$src, pred:$p),
+                    8, IIC_iCMOVix2, []>,
       RegConstraint<"$false = $Rd">, Requires<[IsARM, HasV6T2]>;
 
 let isMoveImm = 1 in
 def MVNCCi : ARMPseudoInst<(outs GPR:$Rd),
-                           (ins GPR:$false, mod_imm:$imm, cmovpred:$p),
-                           4, IIC_iCMOVi,
-                           [(set GPR:$Rd, (ARMcmov GPR:$false, mod_imm_not:$imm,
-                                                   cmovpred:$p))]>,
+                           (ins GPR:$false, mod_imm:$imm, pred:$p),
+                           4, IIC_iCMOVi, []>,
                 RegConstraint<"$false = $Rd">, Sched<[WriteALU]>;
 
 } // hasSideEffects
 
+def : ARMPat<(ARMcmov i32:$false, i32:$Rm, imm:$cc, CPSR),
----------------
statham-arm wrote:

Fine by me – as long as it's in the git history somewhere, people will be able to work it out. And you may be right that the comment has ongoing value outside the context of the change.

https://github.com/llvm/llvm-project/pull/116970