[llvm] [AArch64] Guard against getRegisterBitWidth returning zero in vector instr cost. (PR #117749)

David Green via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 28 17:52:28 PST 2024 

davemgreen wrote:

Thanks. The first part was split out into d106a39c3372b924668f203fedbce69aa986cf50.

https://github.com/llvm/llvm-project/pull/117749

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