[llvm] [AArch64] Guard against getRegisterBitWidth returning zero in vector instr cost. (PR #117749)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 28 17:45:22 PST 2024
https://github.com/davemgreen edited https://github.com/llvm/llvm-project/pull/117749
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