[llvm] 611ccfc - [X86] Add reduced test case for #114360

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 28 10:19:33 PST 2024


Author: Simon Pilgrim
Date: 2024-11-28T18:00:47Z
New Revision: 611ccfcae9842a1356195189d5595ef1684e3df4

URL: https://github.com/llvm/llvm-project/commit/611ccfcae9842a1356195189d5595ef1684e3df4
DIFF: https://github.com/llvm/llvm-project/commit/611ccfcae9842a1356195189d5595ef1684e3df4.diff

LOG: [X86] Add reduced test case for #114360

Added: 
    llvm/test/CodeGen/X86/pr114360.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/pr114360.ll b/llvm/test/CodeGen/X86/pr114360.ll
new file mode 100644
index 00000000000000..025135e4c59b6f
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr114360.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64- -debug-counter=dagcombine=0 | FileCheck %s
+
+; BUG: shrinkAndImmediate folds away the AND after the ZEXT has already been folded away to SUBREG_TO_REG losing implicit zext.
+define i64 @test() {
+; CHECK-LABEL: test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
+; CHECK-NEXT:    retq
+  %x = bitcast i64 u0xffffffff00000001 to i64
+  %t = trunc i64 %x to i32
+  %a = and i32 %t, 1
+  %e = zext i32 %a to i64
+  ret i64 %e
+}


        


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