[llvm] [Xtensa] Implement vararg support. (PR #117126)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 27 15:14:16 PST 2024
================
@@ -378,6 +393,68 @@ SDValue XtensaTargetLowering::LowerFormalArguments(
}
}
+ if (IsVarArg) {
+ static const MCPhysReg XtensaArgRegs[6] = {
+ Xtensa::A2, Xtensa::A3, Xtensa::A4, Xtensa::A5, Xtensa::A6, Xtensa::A7};
+ ArrayRef<MCPhysReg> ArgRegs = ArrayRef(XtensaArgRegs);
+ unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs);
+ const TargetRegisterClass *RC = &Xtensa::ARRegClass;
+ MachineFrameInfo &MFI = MF.getFrameInfo();
+ MachineRegisterInfo &RegInfo = MF.getRegInfo();
+ unsigned RegSize = 4;
+ MVT RegTy = MVT::getIntegerVT(RegSize * 8);
+
+ XtensaFI->setVarArgsFirstGPR(Idx + 2); // 2 - number of a2 register
+
+ XtensaFI->setVarArgsStackOffset(MFI.CreateFixedObject(
+ PtrVT.getSizeInBits() / 8, CCInfo.getStackSize(), true));
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arsenm wrote:
getStoreSize
https://github.com/llvm/llvm-project/pull/117126
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