[llvm] [RegAlloc][RISCV] Increase the spill weight by target factor (PR #113675)

[Luke Lau via llvm-commits]

lukel97 wrote:

> ping @lukel97 and @mikhailramalho re: BP3 perf measurements.

I've kicked off a run now, will report back when the results are ready. 

I'm wondering if this is the right place to discourage the spilling high LMUL registers. There's multiple ways we could do this and increasing the spill weights is just one, e.g. [Local reassignment](https://github.com/lukel97/llvm-project/commit/4075bfc46cf93978d3ca87442c725e737d973546) is another. I have a feeling that the spill weights might really be intended to calculate the frequency of spills, not the overall cost. E.g. there is the possibility that spilling one M8 register allows 8 M1 registers to avoid spills.

FWIW this is approach is also what I originally tried but I think it would be good to hear some thoughts from people that have worked more with the greedy register allocator. 



https://github.com/llvm/llvm-project/pull/113675