[llvm] [RISCV] enable VTYPE before whole RVVReg move (PR #117866)

[Philip Reames via llvm-commits]

preames wrote:

Do you have any performance data available with this patch?  My primary concern with the entire "treat this as a compiler problem" is that we may have some lurking performance problem exposed by the mitigation.  I would *strongly* like to see measurements of this on representative hardware - in particular, hardware like the BP3 which *doesn't* have the faulting behavior.  

For the code itself, this is working in terms of COPY instructions.  I'm not sure this is (or isn't) safe.  Are we absolutely sure we don't have any code anywhere that moves a COPY between vector register allocation and lowering?  I have not done this due diligence, but that seems like a strong claim to make.  To be clear, the code structure bits are addressable.  I suggest using this patch as a test vehicle to check the performance impact *before* bothering to get the patch "just right".  

https://github.com/llvm/llvm-project/pull/117866