[llvm] [AArch64][PAC] Eliminate excessive MOVs when computing blend (PR #115185)

[Anatoly Trosinenko via llvm-commits]

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@@ -2036,8 +2068,20 @@ void AArch64AsmPrinter::emitPtrauthBranch(const MachineInstr *MI) {
 
   unsigned AddrDisc = MI->getOperand(3).getReg();
 
-  // Compute discriminator into x17
-  unsigned DiscReg = emitPtrauthDiscriminator(Disc, AddrDisc);
+  // Make sure AddrDisc is solely used to compute the discriminator.
+  // While hardly meaningful, it is still possible to describe an authentication
+  // of a pointer against its own value (instead of storage address) with
+  // intrinsics, so use report_fatal_error instead of assert.
+  if (BrTarget == AddrDisc)
+    report_fatal_error("Branch target is signed with its own value");
+
+  // If we are printing BLRA pseudo instruction, then x16 and x17 are
+  // implicit-def'ed by the MI and AddrDisc is not used as any other input, so
+  // try to save one MOV by setting MayUseAddrAsScratch.
+  // Unlike BLRA, BRA pseudo is used to perform computed goto, and thus not
+  // declared as clobbering x16/x17.
+  Register DiscReg = emitPtrauthDiscriminator(Disc, AddrDisc, AArch64::X17,
+                                              /*MayUseAddrAsScratch=*/IsCall);
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atrosinenko wrote:

Passing `ScratchReg=AArch64::X17, MayUseAddrAsScratch=false` effectively makes the new version of `emitPtrauthDiscriminator` behave the same way as the old one, except for triggering an assertion if AddrDisc is X17 (this should not be the case for BRA, as according to AArch64InstrInfo.td `AddrDisc` is from `GPR64noip` register class). Thus I assume the BRA case here to be similar to replacing the hand-written discriminator computations with corresponding calls to `emitPtrauthDiscriminator` below: no functional changes are intended, so these should be handled by the existing tests.

https://github.com/llvm/llvm-project/pull/115185