[llvm] [AArch64] Guard against getRegisterBitWidth returning zero in vector instr cost. (PR #117749)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 26 09:25:27 PST 2024
================
@@ -3277,13 +3276,15 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
// important.
UserToExtractIdx[U];
}
+ if (UserToExtractIdx.empty())
----------------
sdesmalen-arm wrote:
I don't see the link with the change in `IsExtractLaneEquivalentToZero`, is this related?
https://github.com/llvm/llvm-project/pull/117749
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