[llvm] [X86] Enforce strict pre-legalization to combine in scalarizeExtEltFP (PR #117681)

[Phoebe Wang via llvm-commits]

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@@ -45877,10 +45878,10 @@ static SDValue scalarizeExtEltFP(SDNode *ExtElt, SelectionDAG &DAG,
   // Vector FP selects don't fit the pattern of FP math ops (because the
   // condition has a different type and we have to change the opcode), so deal
   // with those here.
-  // FIXME: This is restricted to pre type legalization by ensuring the setcc
-  // has i1 elements. If we loosen this we need to convert vector bool to a
-  // scalar bool.
-  if (Vec.getOpcode() == ISD::VSELECT &&
+  // FIXME: This is restricted to pre type legalization. If we loosen this we
+  // need to convert vector bool to a scalar bool.
+  if (DCI.getDAGCombineLevel() < llvm::AfterLegalizeTypes &&
+      Vec.getOpcode() == ISD::VSELECT &&
       Vec.getOperand(0).getOpcode() == ISD::SETCC &&
       Vec.getOperand(0).getValueType().getScalarType() == MVT::i1 &&
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phoebewang wrote:

Add it inside the if block like
```
  if (DCI.getDAGCombineLevel() < llvm::AfterLegalizeTypes &&
      Vec.getOpcode() == ISD::VSELECT &&
      Vec.getOperand(0).getOpcode() == ISD::SETCC &&
      Vec.getOperand(0).getOperand(0).getValueType() == VecVT) {
    assert(Vec.getOperand(0).getValueType().getScalarType() == MVT::i1);
```

I think the result should be always i1 elements for SETCC pre type legalization.

https://github.com/llvm/llvm-project/pull/117681