[llvm] [RISCV] Consolidate VLS codepaths in stack frame manipulation [nfc] (PR #117605)
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Mon Nov 25 10:41:15 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Philip Reames (preames)
<details>
<summary>Changes</summary>
We can move the logic from adjustStackForRVV into adjustReg, which results in the remaining logic being trivially inlined to the two callers and allows a duplicate copy of the same logic in eliminateFrameIndex to be pruned.
---
Full diff: https://github.com/llvm/llvm-project/pull/117605.diff
3 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVFrameLowering.cpp (+9-34)
- (modified) llvm/lib/Target/RISCV/RISCVFrameLowering.h (-3)
- (modified) llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp (+17-13)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index f0bc74e331db46..56b72e4afe4bd8 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -498,36 +498,6 @@ getPushOrLibCallsSavedInfo(const MachineFunction &MF,
return PushOrLibCallsCSI;
}
-void RISCVFrameLowering::adjustStackForRVV(MachineFunction &MF,
- MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- const DebugLoc &DL, int64_t Amount,
- MachineInstr::MIFlag Flag) const {
- assert(Amount != 0 && "Did not need to adjust stack pointer for RVV.");
-
- // Optimize compile time offset case
- StackOffset Offset = StackOffset::getScalable(Amount);
- if (auto VLEN = STI.getRealVLen()) {
- // 1. Multiply the number of v-slots by the (constant) length of register
- const int64_t VLENB = *VLEN / 8;
- assert(Amount % 8 == 0 &&
- "Reserve the stack by the multiple of one vector size.");
- const int64_t NumOfVReg = Amount / 8;
- const int64_t FixedOffset = NumOfVReg * VLENB;
- if (!isInt<32>(FixedOffset)) {
- report_fatal_error(
- "Frame size outside of the signed 32-bit range not supported");
- }
- Offset = StackOffset::getFixed(FixedOffset);
- }
-
- const RISCVRegisterInfo &RI = *STI.getRegisterInfo();
- // We must keep the stack pointer aligned through any intermediate
- // updates.
- RI.adjustReg(MBB, MBBI, DL, SPReg, SPReg, Offset,
- Flag, getStackAlign());
-}
-
static void appendScalableVectorExpression(const TargetRegisterInfo &TRI,
SmallVectorImpl<char> &Expr,
int FixedOffset, int ScalableOffset,
@@ -793,8 +763,12 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
}
if (RVVStackSize) {
- adjustStackForRVV(MF, MBB, MBBI, DL, -RVVStackSize,
- MachineInstr::FrameSetup);
+ // We must keep the stack pointer aligned through any intermediate
+ // updates.
+ RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
+ StackOffset::getScalable(-RVVStackSize),
+ MachineInstr::FrameSetup, getStackAlign());
+
if (!hasFP(MF)) {
// Emit .cfi_def_cfa_expression "sp + StackSize + RVVStackSize * vlenb".
unsigned CFIIndex = MF.addFrameInst(createDefCFAExpression(
@@ -919,8 +893,9 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
// If RestoreSPFromFP the stack pointer will be restored using the frame
// pointer value.
if (!RestoreSPFromFP)
- adjustStackForRVV(MF, MBB, LastFrameDestroy, DL, RVVStackSize,
- MachineInstr::FrameDestroy);
+ RI->adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg,
+ StackOffset::getScalable(RVVStackSize),
+ MachineInstr::FrameDestroy, getStackAlign());
if (!hasFP(MF)) {
unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.h b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
index c106b7b6754653..5e5c45c4ee4c2a 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
@@ -85,9 +85,6 @@ class RISCVFrameLowering : public TargetFrameLowering {
private:
void determineFrameLayout(MachineFunction &MF) const;
- void adjustStackForRVV(MachineFunction &MF, MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
- int64_t Amount, MachineInstr::MIFlag Flag) const;
void emitCalleeSavedRVVPrologCFI(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
bool HasFP) const;
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index ff250b2c9df819..589c2846ddf357 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -184,6 +184,23 @@ void RISCVRegisterInfo::adjustReg(MachineBasicBlock &MBB,
const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>();
const RISCVInstrInfo *TII = ST.getInstrInfo();
+ // Optimize compile time offset case
+ if (Offset.getScalable()) {
+ if (auto VLEN = ST.getRealVLen()) {
+ // 1. Multiply the number of v-slots by the (constant) length of register
+ const int64_t VLENB = *VLEN / 8;
+ assert(Offset.getScalable() % (RISCV::RVVBitsPerBlock / 8) == 0 &&
+ "Reserve the stack by the multiple of one vector size.");
+ const int64_t NumOfVReg = Offset.getScalable() / 8;
+ const int64_t FixedOffset = NumOfVReg * VLENB;
+ if (!isInt<32>(FixedOffset)) {
+ report_fatal_error(
+ "Frame size outside of the signed 32-bit range not supported");
+ }
+ Offset = StackOffset::getFixed(FixedOffset + Offset.getFixed());
+ }
+ }
+
bool KillSrcReg = false;
if (Offset.getScalable()) {
@@ -467,19 +484,6 @@ bool RISCVRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
if (!IsRVVSpill)
Offset += StackOffset::getFixed(MI.getOperand(FIOperandNum + 1).getImm());
- if (Offset.getScalable() &&
- ST.getRealMinVLen() == ST.getRealMaxVLen()) {
- // For an exact VLEN value, scalable offsets become constant and thus
- // can be converted entirely into fixed offsets.
- int64_t FixedValue = Offset.getFixed();
- int64_t ScalableValue = Offset.getScalable();
- assert(ScalableValue % 8 == 0 &&
- "Scalable offset is not a multiple of a single vector size.");
- int64_t NumOfVReg = ScalableValue / 8;
- int64_t VLENB = ST.getRealMinVLen() / 8;
- Offset = StackOffset::getFixed(FixedValue + NumOfVReg * VLENB);
- }
-
if (!isInt<32>(Offset.getFixed())) {
report_fatal_error(
"Frame offsets outside of the signed 32-bit range not supported");
``````````
</details>
https://github.com/llvm/llvm-project/pull/117605
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