[llvm] [RISCV] Fix double counting scalar CSRs with Zcmp when emitting cfi_offset for RVV CSRs. (PR #117408)

[Craig Topper via llvm-commits]

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/117408

>From 5efcdc011df1b072793758aba37df68307bace9d Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 22 Nov 2024 16:16:10 -0800
Subject: [PATCH] [RISCV] Fix double counting scalar CSRs with Zcmp when
 emitting cfi_offset for RVV CSRs.

getCalleeSavedStackSize() already contains RVPushStackSize. Don't
subtract it again.
---
 llvm/lib/Target/RISCV/RISCVFrameLowering.cpp |  3 +--
 llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll  | 14 +++++++-------
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 1ff435b76ad68a..a0fdf77cb0c097 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1758,8 +1758,7 @@ void RISCVFrameLowering::emitCalleeSavedRVVPrologCFI(
   if (!HasFP) {
     uint64_t ScalarLocalVarSize =
         MFI.getStackSize() - RVFI->getCalleeSavedStackSize() -
-        RVFI->getRVPushStackSize() - RVFI->getVarArgsSaveSize() +
-        RVFI->getRVVPadding();
+        RVFI->getVarArgsSaveSize() + RVFI->getRVVPadding();
     FixedSize -= ScalarLocalVarSize;
   }
 
diff --git a/llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll b/llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
index 917df53911c43b..0ae2c2ef9c9d33 100644
--- a/llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll
@@ -172,13 +172,13 @@ define riscv_vector_cc <vscale x 1 x i32> @test_vector_callee_cfi(<vscale x 1 x
 ; OMIT-FP-ZCMP-NEXT:    vs2r.v v2, (a0) # Unknown-size Folded Spill
 ; OMIT-FP-ZCMP-NEXT:    addi a0, sp, 16
 ; OMIT-FP-ZCMP-NEXT:    vs4r.v v4, (a0) # Unknown-size Folded Spill
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x61, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x7f, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v1 @ cfa - 64 - 1 * vlenb
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x62, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x7d, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v2 @ cfa - 64 - 3 * vlenb
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x63, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x7e, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v3 @ cfa - 64 - 2 * vlenb
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x64, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x79, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v4 @ cfa - 64 - 7 * vlenb
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x65, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x7a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v5 @ cfa - 64 - 6 * vlenb
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x66, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x7b, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v6 @ cfa - 64 - 5 * vlenb
-; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x67, 0x0b, 0x11, 0x40, 0x22, 0x11, 0x7c, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v7 @ cfa - 64 - 4 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x61, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x7f, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v1 @ cfa - 32 - 1 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x62, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x7d, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v2 @ cfa - 32 - 3 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x63, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x7e, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v3 @ cfa - 32 - 2 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x64, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x79, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v4 @ cfa - 32 - 7 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x65, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x7a, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v5 @ cfa - 32 - 6 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x66, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x7b, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v6 @ cfa - 32 - 5 * vlenb
+; OMIT-FP-ZCMP-NEXT:    .cfi_escape 0x10, 0x67, 0x0b, 0x11, 0x60, 0x22, 0x11, 0x7c, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # $v7 @ cfa - 32 - 4 * vlenb
 ; OMIT-FP-ZCMP-NEXT:    #APP
 ; OMIT-FP-ZCMP-NEXT:    #NO_APP
 ; OMIT-FP-ZCMP-NEXT:    csrr a0, vlenb