[llvm] AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction (PR #117102)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 25 09:12:48 PST 2024
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117102
>From f9b2faf43544ec99ebe4542ef3aceb9a3ac08306 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 20 Nov 2024 18:07:04 -0800
Subject: [PATCH] AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR
instruction
This provides infrastructure for a future optimization.
---
llvm/lib/Target/AMDGPU/SIInstrInfo.h | 5 +++++
llvm/lib/Target/AMDGPU/SIInstrInfo.td | 9 ++++++++
llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 23 +++++++++++++--------
3 files changed, 28 insertions(+), 9 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index e55418326a4bd0..960fbb7ea15ce7 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1568,6 +1568,11 @@ namespace AMDGPU {
LLVM_READONLY
int getMFMAEarlyClobberOp(uint16_t Opcode);
+ /// \returns Version of an MFMA instruction which uses AGPRs for srcC and
+ /// vdst, given an \p Opcode of an MFMA which uses VGPRs for srcC/vdst.
+ LLVM_READONLY
+ int getMFMASrcCVDstAGPROp(uint16_t Opcode);
+
/// \returns v_cmpx version of a v_cmp instruction.
LLVM_READONLY
int getVCMPXOpFromVCMP(uint16_t Opcode);
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index 7f77270a931835..e7fbcee2286be0 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -3174,6 +3174,15 @@ def getMFMAEarlyClobberOp : InstrMapping {
let ValueCols = [["0"]];
}
+// Map from an mfma using VGPRs to one using AGPRs.
+def getMFMASrcCVDstAGPROp : InstrMapping {
+ let FilterClass = "MFMATable";
+ let RowFields = ["AGPROp"];
+ let ColFields = ["MFMAKind"];
+ let KeyCol = ["VGPR"];
+ let ValueCols = [["AGPR"]];
+}
+
// Maps an v_cmp instruction to its v_cmpx equivalent.
def getVCMPXOpFromVCMP : InstrMapping {
let FilterClass = "VCMPVCMPXTable";
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index 5d8dc5ccd18e55..9099df6e4bf570 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -742,9 +742,14 @@ def VOPProfileMAI_I32_V4I32_X16 : VOPProfileMAI<VOP_V16I32_V4I32_V4I32_V16I3
def VOPProfileMAI_I32_V4I32_X16_VCD : VOPProfileMAI<VOP_V16I32_V4I32_V4I32_V16I32, VISrc_512_b32, VDst_512, AVSrc_128>;
-class MFMATable <bit is_mac, string Name> {
+class MFMATable <bit is_mac, string Kind, string Name,
+ string AGPROpName = NAME> {
bit IsMac = is_mac;
string FMAOp = Name;
+ string AGPROp = AGPROpName;
+
+ // Does this MFMA use "AGPR" or "VGPR" for srcC/vdst
+ string MFMAKind = Kind;
}
class MFMA_F8F6F4_WithSizeTable<int A, int B, Instruction ThisVariant, Instruction F8F8Variant> {
@@ -850,12 +855,12 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node = null_frag,
let Constraints = !if(NoDstOverlap, "@earlyclobber $vdst", "") in {
def _e64 : MAIInst<OpName, !cast<VOPProfileMAI>("VOPProfileMAI_" # P),
!if(!or(NoDstOverlap, !eq(node, null_frag)), null_frag, AgprMAIFrag<node, HasAbid, Scaled>), Scaled>,
- MFMATable<0, NAME # "_e64">;
+ MFMATable<0, "AGPR", NAME # "_e64">;
let OtherPredicates = [isGFX90APlus], Mnemonic = OpName in
def _vgprcd_e64 : MAIInst<OpName # "_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
!if(!or(NoDstOverlap, !eq(node, null_frag)), null_frag, VgprMAIFrag<node, HasAbid, Scaled>), Scaled>,
- MFMATable<0, NAME # "_vgprcd_e64">;
+ MFMATable<0, "VGPR", NAME # "_vgprcd_e64", NAME # "_e64">;
}
if NoDstOverlap then {
@@ -864,12 +869,12 @@ multiclass MAIInst<string OpName, string P, SDPatternOperator node = null_frag,
Mnemonic = OpName in {
def "_mac_e64" : MAIInst<OpName # "_mac", !cast<VOPProfileMAI>("VOPProfileMAI_" # P),
!if(!eq(node, null_frag), null_frag, AgprMAIFrag<node, HasAbid, Scaled>), Scaled>,
- MFMATable<1, NAME # "_e64">;
+ MFMATable<1, "AGPR", NAME # "_e64", NAME # "_mac_e64">;
let OtherPredicates = [isGFX90APlus] in
def _mac_vgprcd_e64 : MAIInst<OpName # "_mac_vgprcd", !cast<VOPProfileMAI>("VOPProfileMAI_" # P # "_VCD"),
!if(!eq(node, null_frag), null_frag, VgprMAIFrag<node, HasAbid, Scaled>), Scaled>,
- MFMATable<1, NAME # "_vgprcd_e64">;
+ MFMATable<1, "VGPR", NAME # "_vgprcd_e64">;
}
}
} // End isConvergent = 1, mayRaiseFPException = 0, ReadsModeReg = 1
@@ -886,11 +891,11 @@ multiclass ScaledMAIInst_mc<string OpName, string UnscaledOpName_, SDPatternOper
def _e64 : ScaledMAIInst<OpName,
!cast<MAIInst>(UnscaledOpName#"_e64"), !if(NoDstOverlap, null_frag, AgprMAIFrag<node, HasAbid, true>)>,
- MFMATable<0, NAME # "_e64">;
+ MFMATable<0, "AGPR", NAME # "_e64">;
def _vgprcd_e64 : ScaledMAIInst<OpName # "_vgprcd",
!cast<MAIInst>(UnscaledOpName#"_vgprcd_e64"), !if(NoDstOverlap, null_frag, VgprMAIFrag<node, HasAbid, true>)>,
- MFMATable<0, NAME # "_vgprcd_e64">;
+ MFMATable<0, "VGPR", NAME # "_vgprcd_e64", NAME # "_e64">;
if NoDstOverlap then {
let Constraints = !if(NoDstOverlap, "$vdst = $src2", ""),
@@ -898,11 +903,11 @@ multiclass ScaledMAIInst_mc<string OpName, string UnscaledOpName_, SDPatternOper
Mnemonic = UnscaledOpName_ in {
def _mac_e64 : ScaledMAIInst<OpName # "_mac",
!cast<MAIInst>(UnscaledOpName # "_mac_e64"), AgprMAIFrag<node, HasAbid, true>>,
- MFMATable<1, NAME # "_e64">;
+ MFMATable<1, "AGPR", NAME # "_e64">;
def _mac_vgprcd_e64 : ScaledMAIInst<OpName # " _mac_vgprcd",
!cast<MAIInst>(UnscaledOpName # "_mac_vgprcd_e64"), VgprMAIFrag<node, HasAbid, true>>,
- MFMATable<1, NAME # "_vgprcd_e64">;
+ MFMATable<1, "VGPR", NAME # "_vgprcd_e64", NAME # "_mac_e64">;
}
}
}
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