[llvm] [RISCV][MachineVerifier] Use RegUnit for register liveness checking (PR #115980)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `clang-armv8-quick` running on `linaro-clang-armv8-quick` while building `llvm` at step 5 "ninja check 1".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/154/builds/7989

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (ninja check 1) failure: stage 1 checked (failure)
******************** TEST 'LLVM :: MachineVerifier/RISCV/subreg-liveness.mir' FAILED ********************
Exit Code: 2

Command Output (stderr):
--
RUN: at line 2: /home/tcwg-buildbot/worker/clang-armv8-quick/stage1/bin/llc -mtriple=riscv64 -mattr=+v -run-pass=none /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/llvm/test/MachineVerifier/RISCV/subreg-liveness.mir -o - | /home/tcwg-buildbot/worker/clang-armv8-quick/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/llvm/test/MachineVerifier/RISCV/subreg-liveness.mir
+ /home/tcwg-buildbot/worker/clang-armv8-quick/stage1/bin/llc -mtriple=riscv64 -mattr=+v -run-pass=none /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/llvm/test/MachineVerifier/RISCV/subreg-liveness.mir -o -
+ /home/tcwg-buildbot/worker/clang-armv8-quick/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/llvm/test/MachineVerifier/RISCV/subreg-liveness.mir
/home/tcwg-buildbot/worker/clang-armv8-quick/stage1/bin/llc: error: unable to get target for 'riscv64', see --version and --triple.FileCheck error: '<stdin>' is empty.
FileCheck command line:  /home/tcwg-buildbot/worker/clang-armv8-quick/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/llvm/test/MachineVerifier/RISCV/subreg-liveness.mir

--

********************


```

</details>

https://github.com/llvm/llvm-project/pull/115980