[llvm] 8d65073 - [AMDGPU] Fix AMDGPUISD::TRAP description (#117453)

via llvm-commits llvm-commits at lists.llvm.org
Sat Nov 23 22:25:18 PST 2024


Author: Sergei Barannikov
Date: 2024-11-24T09:25:15+03:00
New Revision: 8d650736c19f2bd6a84dc29ec0becfceb357a739

URL: https://github.com/llvm/llvm-project/commit/8d650736c19f2bd6a84dc29ec0becfceb357a739
DIFF: https://github.com/llvm/llvm-project/commit/8d650736c19f2bd6a84dc29ec0becfceb357a739.diff

LOG: [AMDGPU] Fix AMDGPUISD::TRAP description (#117453)

Glue operand is only present if there are variadic register operands,
which makes it optional.
Also, change the number of fixed operands to 1 (the trap ID).

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
index 702f6e67c55271..bec294a945d2fe 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
@@ -100,8 +100,8 @@ def AMDGPUtc_return_chain: SDNode<"AMDGPUISD::TC_RETURN_CHAIN",
 >;
 
 def AMDGPUtrap : SDNode<"AMDGPUISD::TRAP",
-  SDTypeProfile<0, -1, [SDTCisVT<0, i16>]>,
-    [SDNPHasChain, SDNPVariadic, SDNPSideEffect, SDNPInGlue]
+  SDTypeProfile<0, 1, [SDTCisVT<0, i16>]>,
+    [SDNPHasChain, SDNPVariadic, SDNPSideEffect, SDNPOptInGlue]
 >;
 
 def AMDGPUconstdata_ptr : SDNode<


        


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