[llvm] [RISCV] Add mvendorid/marchid/mimpid to CPU definitions (PR #116202)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-rel-x86-64` running on `ml-opt-rel-x86-64-b2` while building `llvm` at step 5 "build-unified-tree".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/185/builds/8982

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (build-unified-tree) failure: build (failure)
...
18.667 [2560/64/1112] Building CXX object lib/Target/Lanai/Disassembler/CMakeFiles/LLVMLanaiDisassembler.dir/LanaiDisassembler.cpp.o
18.707 [2559/64/1113] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiELFObjectWriter.cpp.o
18.719 [2558/64/1114] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiAsmBackend.cpp.o
18.765 [2557/64/1115] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiMCAsmInfo.cpp.o
18.783 [2556/64/1116] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiInstPrinter.cpp.o
18.803 [2555/64/1117] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiMCCodeEmitter.cpp.o
18.837 [2554/64/1118] Building LoongArchGenAsmMatcher.inc...
18.850 [2553/64/1119] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiMCExpr.cpp.o
18.872 [2552/64/1120] Building CXX object lib/Target/Lanai/MCTargetDesc/CMakeFiles/LLVMLanaiDesc.dir/LanaiMCTargetDesc.cpp.o
19.130 [2551/64/1121] Building CXX object lib/IR/CMakeFiles/LLVMCore.dir/Type.cpp.o
FAILED: lib/IR/CMakeFiles/LLVMCore.dir/Type.cpp.o 
ccache /usr/bin/c++ -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/b/ml-opt-rel-x86-64-b1/build/lib/IR -I/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/lib/IR -I/var/lib/buildbot/.local/lib/python3.7/site-packages/tensorflow/include -I/b/ml-opt-rel-x86-64-b1/build/include -I/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/include -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -fno-lifetime-dse -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG  -fno-exceptions -funwind-tables -fno-rtti -UNDEBUG -std=c++17 -MD -MT lib/IR/CMakeFiles/LLVMCore.dir/Type.cpp.o -MF lib/IR/CMakeFiles/LLVMCore.dir/Type.cpp.o.d -o lib/IR/CMakeFiles/LLVMCore.dir/Type.cpp.o -c /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/lib/IR/Type.cpp
In file included from /b/ml-opt-rel-x86-64-b1/llvm-project/llvm/lib/IR/Type.cpp:29:
/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/include/llvm/TargetParser/RISCVTargetParser.h:46:12: error: declaration of ‘llvm::RISCV::CPUModel llvm::RISCV::CPUInfo::CPUModel’ changes meaning of ‘CPUModel’ [-fpermissive]
   46 |   CPUModel CPUModel;
      |            ^~~~~~~~
/b/ml-opt-rel-x86-64-b1/llvm-project/llvm/include/llvm/TargetParser/RISCVTargetParser.h:35:8: note: ‘CPUModel’ declared here as ‘struct llvm::RISCV::CPUModel’
   35 | struct CPUModel {
      |        ^~~~~~~~
19.158 [2551/63/1122] Building MipsGenCallingConv.inc...
19.167 [2551/62/1123] Building LoongArchGenAsmWriter.inc...
19.190 [2551/61/1124] Building HexagonGenMCCodeEmitter.inc...
19.241 [2551/60/1125] Building HexagonGenCallingConv.inc...
19.258 [2551/59/1126] Building MipsGenExegesis.inc...
19.303 [2551/58/1127] Building LoongArchGenDisassemblerTables.inc...
19.357 [2551/57/1128] Building HexagonGenRegisterInfo.inc...
19.463 [2551/56/1129] Building HexagonGenAsmMatcher.inc...
19.477 [2551/55/1130] Building HexagonGenAsmWriter.inc...
19.616 [2551/54/1131] Building MipsGenAsmWriter.inc...
19.631 [2551/53/1132] Building MSP430GenAsmMatcher.inc...
19.681 [2551/52/1133] Building HexagonGenSubtargetInfo.inc...
19.718 [2551/51/1134] Building MSP430GenAsmWriter.inc...
19.739 [2551/50/1135] Building MipsGenDisassemblerTables.inc...
19.754 [2551/49/1136] Building HexagonGenDisassemblerTables.inc...
19.813 [2551/48/1137] Building MSP430GenCallingConv.inc...
19.827 [2551/47/1138] Building MipsGenAsmMatcher.inc...
19.843 [2551/46/1139] Building HexagonGenDFAPacketizer.inc...
19.912 [2551/45/1140] Building MSP430GenMCCodeEmitter.inc...
20.010 [2551/44/1141] Building MSP430GenSubtargetInfo.inc...
20.064 [2551/43/1142] Building MSP430GenRegisterInfo.inc...
20.172 [2551/42/1143] Building MipsGenPostLegalizeGICombiner.inc...
20.173 [2551/41/1144] Building MipsGenFastISel.inc...
20.226 [2551/40/1145] Building MipsGenMCPseudoLowering.inc...
20.280 [2551/39/1146] Building MipsGenRegisterBank.inc...
20.322 [2551/38/1147] Building MipsGenDAGISel.inc...
20.423 [2551/37/1148] Building MipsGenRegisterInfo.inc...
20.477 [2551/36/1149] Building LoongArchGenDAGISel.inc...
20.516 [2551/35/1150] Building LoongArchGenInstrInfo.inc...
20.655 [2551/34/1151] Building MSP430GenInstrInfo.inc...

```

</details>

https://github.com/llvm/llvm-project/pull/116202