[llvm] f84fc44 - [RISCV][GISel] Make s16->s32 G_ANYEXT/SEXT/ZEXT legal.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 21 22:47:36 PST 2024
Author: Craig Topper
Date: 2024-11-21T22:45:25-08:00
New Revision: f84fc44f1a46969817bfd1b38991f7e43a8efe1d
URL: https://github.com/llvm/llvm-project/commit/f84fc44f1a46969817bfd1b38991f7e43a8efe1d
DIFF: https://github.com/llvm/llvm-project/commit/f84fc44f1a46969817bfd1b38991f7e43a8efe1d.diff
LOG: [RISCV][GISel] Make s16->s32 G_ANYEXT/SEXT/ZEXT legal.
Added:
Modified:
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index b557659ae0765e..4e9090307e2f8d 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -155,8 +155,8 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
.clampScalar(0, sXLen, sXLen);
getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
- .legalFor({{sXLen, s16}})
- .legalFor(ST.is64Bit(), {{s64, s32}})
+ .legalFor({{s32, s16}})
+ .legalFor(ST.is64Bit(), {{s64, s16}, {s64, s32}})
.legalIf(all(typeIsLegalIntOrFPVec(0, IntOrFPVecTys, ST),
typeIsLegalIntOrFPVec(1, IntOrFPVecTys, ST)))
.customIf(typeIsLegalBoolVec(1, BoolVecTys, ST))
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
index 650804db398317..f3bc1ce28cfa67 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
@@ -44,3 +44,117 @@ body: |
PseudoRET implicit $x10
...
+---
+name: anyext_16_i32
+body: |
+ ; CHECK-LABEL: name: anyext_16_i32
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: liveins: $x10, $x11
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load (s16))
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD]](s16)
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
+ ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s64), [[ANYEXT]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[ANYEXT1]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10
+ bb.0.entry:
+ bb.1:
+ liveins: $x10, $x11
+
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s1) = G_TRUNC %1(s64)
+ %3:_(s32) = G_CONSTANT i32 0
+ %4:_(s16) = G_LOAD %0(p0) :: (load (s16))
+ %5:_(s32) = G_ANYEXT %4(s16)
+ %6:_(s32) = G_SELECT %2(s1), %5, %3
+ %7:_(s64) = G_ANYEXT %6(s32)
+ $x10 = COPY %7(s64)
+ PseudoRET implicit $x10
+
+...
+---
+name: sext_16_i32
+body: |
+ ; CHECK-LABEL: name: sext_16_i32
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: liveins: $x10, $x11
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load (s16))
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[LOAD]](s16)
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
+ ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s64), [[SEXT]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10
+ bb.0.entry:
+ bb.1:
+ liveins: $x10, $x11
+
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s1) = G_TRUNC %1(s64)
+ %3:_(s32) = G_CONSTANT i32 0
+ %4:_(s16) = G_LOAD %0(p0) :: (load (s16))
+ %5:_(s32) = G_SEXT %4(s16)
+ %6:_(s32) = G_SELECT %2(s1), %5, %3
+ %7:_(s64) = G_ANYEXT %6(s32)
+ $x10 = COPY %7(s64)
+ PseudoRET implicit $x10
+
+...
+---
+name: zext_16_i32
+body: |
+ ; CHECK-LABEL: name: zext_16_i32
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: liveins: $x10, $x11
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
+ ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load (s16))
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[LOAD]](s16)
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
+ ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s64), [[ZEXT]], [[TRUNC]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
+ ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $x10
+ bb.0.entry:
+ bb.1:
+ liveins: $x10, $x11
+
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s1) = G_TRUNC %1(s64)
+ %3:_(s32) = G_CONSTANT i32 0
+ %4:_(s16) = G_LOAD %0(p0) :: (load (s16))
+ %5:_(s32) = G_ZEXT %4(s16)
+ %6:_(s32) = G_SELECT %2(s1), %5, %3
+ %7:_(s64) = G_ANYEXT %6(s32)
+ $x10 = COPY %7(s64)
+ PseudoRET implicit $x10
+
+...
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