[llvm] [GlobalISel] Correct comment about type vs register class (PR #116083)

[Daniel Sanders via llvm-commits]

https://github.com/dsandersllvm updated https://github.com/llvm/llvm-project/pull/116083

>From efa4cd3f43e91c89e9294f6458fe0af85e3a78d1 Mon Sep 17 00:00:00 2001
From: Daniel Sanders <daniel_l_sanders at apple.com>
Date: Wed, 13 Nov 2024 09:35:48 -0800
Subject: [PATCH 1/2] [GlobalISel] Correct comment about type vs register class

Type and register class aren't mutually exclusive in gMIR but target
instructions don't have types on their operands that have register classes.
---
 llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index 827da6a2ed8098..a657e1f8abd419 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -148,9 +148,10 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
   LLT DstTy = MRI.getType(R);
 
   // Handle the case where this is called on a register that does not have a
-  // type constraint (i.e. it has a register class constraint instead). This is
-  // unlikely to occur except by looking through copies but it is possible for
-  // the initial register being queried to be in this state.
+  // type constraint (i.e. it's a target instruction with a register class
+  // constraint instead). This is unlikely to occur except by looking through
+  // copies but it is possible for the initial register being queried to be in
+  // this state.
   if (!DstTy.isValid()) {
     Known = KnownBits();
     return;

>From 222cbb6df06019c98bc26e67bef69e1b439ec920 Mon Sep 17 00:00:00 2001
From: Daniel Sanders <daniel_l_sanders at apple.com>
Date: Fri, 15 Nov 2024 16:32:21 -0800
Subject: [PATCH 2/2] fixup new comment to account for changes to behaviour
 since this was first written

---
 llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index a657e1f8abd419..30cd3ce3baa502 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -148,10 +148,8 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
   LLT DstTy = MRI.getType(R);
 
   // Handle the case where this is called on a register that does not have a
-  // type constraint (i.e. it's a target instruction with a register class
-  // constraint instead). This is unlikely to occur except by looking through
-  // copies but it is possible for the initial register being queried to be in
-  // this state.
+  // type constraint. For example, it may be post-ISel or this target might not
+  // preserve the type when early-selecting instructions.
   if (!DstTy.isValid()) {
     Known = KnownBits();
     return;